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AD204J データシート(PDF) 7 Page - Analog Devices |
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AD204J データシート(HTML) 7 Page - Analog Devices |
7 / 12 page AD202/AD204 REV. B –7– Figure 10b. AD202 Dynamics and Noise. Frequency response plots for the AD202 and AD204 are given in Figure 11. Since neither isola- tor is slew-rate limited, the plots apply for both large and small signals. Capacitive loads of up to 470 pF will not materially af- fect frequency response. When large signals beyond a few hun- dred Hz will be present, it is advisable to bypass –VISO and +VISO to IN COM with 1 µF tantalum capacitors even if the isolated supplies are not loaded. At 50 Hz/60 Hz, phase shift through the AD202/AD204 is typically 0.8 ° (lagging). Typical unit—unit variation is ±0.2° (lagging). Figure 11. Frequency Response at Several Gains The step response of the AD204 for very fast input signals can be improved by the use of an input filter, as shown in Figure 12. The filter limits the bandwidth of the input (to about 5.3 kHz) so that the isolator does not see fast, out-of-band input terms that can cause small amounts ( ±0.3%) of internal ringing. The AD204 will then settle to ±0.1% in about 300 microseconds for a 10 V step. Figure 12. Input Filter for Improved Step Response Except at the highest useful gains, the noise seen at the output of the AD202 and AD204 will be almost entirely comprised of carrier ripple at multiples of 25 kHz. The ripple is typically 2 mV p-p near zero output and increases to about 7 mV p-p for outputs of ±5 V (1 MHz measurement bandwidth). Adding a capacitor across the output will reduce ripple at the expense of bandwidth: for example, 0.05 µF at the output of the AD204 will result in 1.5 mV ripple at ±5 V, but signal bandwidth will be down to 1 kHz. When the full isolator bandwidth is needed, the simple two-pole active filter shown in Figure 13 can be used. It will reduce ripple to 0.1 mV p-p with no loss of signal bandwidth, and also serves as an output buffer. An output buffer or filter may sometimes show output spikes that do not appear at its input. This is usually due to clock noise appearing at the op amp’s supply pins (since most op amps have little or no supply rejection at high frequencies). Another com- mon source of carrier-related noise is the sharing of a ground track by both the output circuit and the power input. Figure 13 shows how to avoid these problems: the clock/supply port of the isolator does not share ground or 15 V tracks with any signal circuits, and the op amp’s supply pins are bypassed to signal common (note that the grounded filter capacitor goes here as well). Ideally, the output signal LO lead and the supply com- mon meet where the isolator output is actually measured, e.g., at an A/D converter input. If that point is more than a few feet from the isolator, it may be useful to bypass output LO to sup- ply common at the isolator with a 0.1 µF capacitor. In applications where more than a few AD204s are driven by a single clock driver, substantial current spikes will flow in the power return line and in whichever signal out lead returns to a low impedance point (usually output LO). Both of these tracks (Circuit figures shown on this page are for SIP style pack- ages. Refer to page 3 for proper DIP package pinout.) |
同様の部品番号 - AD204J |
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同様の説明 - AD204J |
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