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AD5303 データシート(PDF) 2 Page - Analog Devices

部品番号 AD5303
部品情報  2.5 V to 5.5 V, 230 uA, Dual Rail-to-Rail Voltage Output 8-/10-/12-Bit DACs
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

AD5303 データシート(HTML) 2 Page - Analog Devices

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REV. 0
–2–
AD5303/AD5313/AD5323–SPECIFICATIONS
(VDD = +2.5 V to +5.5 V; VREF = +2 V; RL = 2 k
to GND; CL = 200 pF to GND; all specifications TMIN to TMAX unless otherwise noted.)
B Version
2
Parameter
1
Min
Typ
Max
Units
Conditions/Comments
DC PERFORMANCE
3, 4
AD5303
Resolution
8
Bits
Relative Accuracy
±0.15
±1
LSB
Differential Nonlinearity
±0.02
±0.25
LSB
Guaranteed Monotonic by Design Over All Codes
AD5313
Resolution
10
Bits
Relative Accuracy
±0.5
±3
LSB
Differential Nonlinearity
±0.05
±0.5
LSB
Guaranteed Monotonic by Design Over All Codes
AD5323
Resolution
12
Bits
Relative Accuracy
±2
±12
LSB
Differential Nonlinearity
±0.2
±1
LSB
Guaranteed Monotonic by Design Over All Codes
Offset Error
±0.4
±3
% of FSR
See Figures 3 and 4
Gain Error
±0.15
±1
% of FSR
See Figures 3 and 4
Lower Deadband
10
60
mV
See Figures 3 and 4
Offset Error Drift5
–12
ppm of FSR/
°C
Gain Error Drift
5
–5
ppm of FSR/
°C
Power Supply Rejection Ratio
5
–60
dB
∆VDD = ±10%
DC Crosstalk
5
30
µV
DAC REFERENCE INPUTS
5
VREF Input Range
1
VDD
V
Buffered Reference Mode
0VDD
V
Unbuffered Reference Mode
VREF Input Impedance
>10
M
Buffered Reference Mode
180
k
Unbuffered Reference Mode. 0–VREF Output Range,
Input Impedance = RDAC
90
k
Unbuffered Reference Mode. 0–2 VREF Output Range,
Input Impedance = RDAC
Reference Feedthrough
–90
dB
Frequency = 10 kHz
Channel-to-Channel Isolation
–80
dB
Frequency = 10 kHz
OUTPUT CHARACTERISTICS
5
Minimum Output Voltage
6
0.001
V mi
n
This is a measure of the minimum and maximum
Maximum Output Voltage
6
VDD – 0.001
V max
drive capability of the output amplifier.
DC Output Impedance
0.5
Short Circuit Current
50
mA
VDD = +5 V
20
mA
VDD = +3 V
Power-Up Time
2.5
µs
Coming Out of Power-Down Mode. VDD = +5 V
5
µs
Coming Out of Power-Down Mode. VDD = +3 V
LOGIC INPUTS
5
Input Current
±1
µA
VIL, Input Low Voltage
0.8
V
VDD = +5 V
± 10%
0.6
V
VDD = +3 V
± 10%
0.5
V
VDD = +2.5 V
VIH, Input High Voltage
2.4
V
VDD = +5 V
± 10%
2.1
V
VDD = +3 V
± 10%
2.0
V
VDD = +2.5 V
Pin Capacitance
2
3.5
pF
LOGIC OUTPUT (SDO)
5
VDD = +5 V
± 10%
Output Low Voltage
0.4
V
ISINK = 2 mA
Output High Voltage
4.0
V
ISOURCE = 2 mA
VDD = +3 V
± 10%
Output Low Voltage
0.4
V
ISINK = 2 mA
Output High Voltage
2.4
V
ISOURCE = 2 mA
Floating-State Leakage Current
1
µA
DCEN = GND
Floating State O/P Capacitance
3
pF
DCEN = GND
POWER REQUIREMENTS
VDD
2.5
5.5
V
IDD Specification Is Valid for All DAC Codes
IDD (Normal Mode)
Both DACs Active and Excluding Load Currents
VDD = +4.5 V to +5.5 V
300
450
µA
Both DACs in Unbuffered Mode. VIH = VDD and
VDD = +2.5 V to +3.6 V
230
350
µAVIL = GND. In Buffered Mode, extra current is
typically x
µA per DAC where x = 5 µA + V
REF/RDAC.
IDD (Full Power-Down)
VDD = +4.5 V to +5.5 V
0.2
1
µA
VDD = +2.5 V to +3.6 V
0.05
1
µA


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