データシートサーチシステム |
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LM10011 データシート(PDF) 9 Page - Texas Instruments |
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LM10011 データシート(HTML) 9 Page - Texas Instruments |
9 / 21 page rise Edge-Detector fall VIDA UVLO D Q Q R UVLO rise fall VID[3] Bandgap Core + - IREF 6 bit IDAC IDAC_OUT 0 ± 56.4 / 59.2 µA (4-bit / 6-bit) UVLO (VDD > 2.65V) PRECISION ENABLE (1.34V) VDD EN DISABLE GND Slew Limit Logic Receiver Update DAC VIDB VIDC VIDS 3 µs deglitch Logic Receiver 3 µs deglitch Logic Receiver 3 µs deglitch Logic Receiver 6 µs deglitch VID[0] D Q Q R UVLO D Q Q R UVLO rise fall VID[4] VID[1] D Q Q R UVLO D Q Q R UVLO rise fall VID[5] VID[2] D Q Q R 3 µs deglitch VID Start- Up Current Set 6-BIT MODE=0 Edge- Detector VID[0] VID[1] VID[2] VID[3] 4-BIT MODE=1 MODE RSET 3 µs deglitch LM10011 www.ti.com SNVS822 – DECEMBER 2012 BLOCK DIAGRAM Figure 2. LM10011 Block Diagram Copyright © 2012, Texas Instruments Incorporated 9 Product Folder Links: LM10011 |
同様の部品番号 - LM10011 |
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同様の説明 - LM10011 |
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