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74F158ASC データシート(PDF) 2 Page - Fairchild Semiconductor

部品番号 74F158ASC
部品情報  Quad 2-Input Multiplexer
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メーカー  FAIRCHILD [Fairchild Semiconductor]
ホームページ  http://www.fairchildsemi.com
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74F158ASC データシート(HTML) 2 Page - Fairchild Semiconductor

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Unit Loading/Fan Out
Truth Table
H
= HIGH Voltage Level
L
= LOW Voltage Level
X
= Immaterial
Zn = E × (I1nS + I0n S)
Functional Description
The F158A quad 2-input multiplexer selects four bits of
data from two sources under the control of a common
Select input (S) and presents the data in inverted form at
the four outputs. The Enable input (E) is active LOW. When
E is HIGH, all of the outputs (Z) are forced HIGH regard-
less of all other inputs. The F158A is the logic implementa-
tion of a 4-pole, 2-position switch where the position of the
switch is determined by the logic levels supplied to the
Select input.
A common use of the F158A is the moving of data from two
groups of registers to four common output busses. The
particular register from which the data comes is determined
by the state of the Select input. A less obvious use is as a
function generator. The F158A can generate four functions
of two variables with one variable common. This is useful
for implementing gating functions.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Pin Names
Description
U.L.
Input IIH/IIL
HIGH/LOW
Output IOH/IOL
I0a–I0d
Source 0 Data Inputs
1.0/1.0
20
µA/−0.6 mA
I1a–I1d
Source 1 Data Inputs
1.0/1.0
20
µA/−0.6 mA
E
Enable Input (Active LOW)
1.0/1.0
20
µA/−0.6 mA
S
Select Input
1.0/1.0
20
µA/−0.6 mA
Za–Zd
Inverted Outputs
50/33.3
−1 mA/20 mA
Inputs
Outputs
E
SI0
I1
Z
HX
X
X
H
LL
L
X
H
LL
H
X
L
LH
X
L
H
LH
X
H
L


同様の部品番号 - 74F158ASC

メーカー部品番号データシート部品情報
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同様の説明 - 74F158ASC

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