74LCX38M datasheet(3/7 Pages) FAIRCHILD

部品番号	74LCX38M

部品情報	Low Voltage Quad 2-Input NAND Gate (Open Drain) with 5V Tolerant Inputs

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AC Electrical Characteristics

Note 5: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The

specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).

Dynamic Switching Characteristics

Capacitance

Symbol

Parameter

TA 40qC to 85qC, RL 500 :

Units

VCC 3.3V r 0.3V

VCC 2.7V

VCC 2.5V r 0.2V

CL 50 pF

CL 30 pF

Min

Max

Min

Max

Min

Max

tPZL

Propagation Delay Time

1.5

5.0

1.5

5.5

1.5

6.5

ns

tPLZ

1.5

5.0

1.5

5.5

1.5

6.0

tOSHL

Output to Output Skew

1.0

ns

tOSLH

(Note 5)

1.0

Symbol

Parameter

Conditions

VCC

TA 25qC

Units

(V)

Typical

VOLP

Quiet Output Dynamic Peak VOL

CL 50 pF, VIH 3.3V, VIL 0V

3.3

0.8

V

CL 30 pF, VIH 2.5V, VIL 0V

2.5

0.6

VOLV

Quiet Output Dynamic Valley VOL

CL 50 pF, VIH 3.3V, VIL 0V

3.3

0.8

V

CL 30 pF, VIH 2.5V, VIL 0V

2.5

0.6

Symbol

Parameter

Conditions

Typical

Units

CIN

Input Capacitance

VCC Open, VI 0V or VCC

7pF

COUT

Output Capacitance

VCC 3.3V, VI 0V or VCC

8pF

CPD

Power Dissipation Capacitance

VCC 3.3V, VI 0V or VCC, f 10 MHz

25

pF

同様の部品番号 - 74LCX38M

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ON Semiconductor	74LCX32	755Kb / 14P	Low Voltage Quad 2-Input OR Gate with 5V Tolerant Inputs December 2013 Rev. 1.6.1
ON Semiconductor	74LCX32	764Kb / 12P	Low Voltage Quad 2-Input OR Gate with 5 V Tolerant Inputs April, 2020 ??Rev. 2

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