74LCX74MTC datasheet(2/11 Pages) FAIRCHILD

部品番号	74LCX74MTC

部品情報	Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs

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メーカー	FAIRCHILD [Fairchild Semiconductor]

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Logic Symbols

IEEE/IEC

Pin Descriptions

Connection Diagrams

Pin Assignments for SOIC, SOP, and TSSOP

Pad Assignment for DQFN

(Top View)

Truth Table

(Each Half)

H

HIGH Voltage Level

L

LOW Voltage Level

X

Immaterial

LOW-to-HIGH Clock Transition

Q0(Q0)

Previous Q(Q) before LOW-to-HIGH Transition of Clock

Pin Names

Description

D1, D2

Data Inputs

CP1, CP2

Clock Pulse Inputs

CD1, CD2

Direct Clear Inputs

SD1, SD2

Direct Set Inputs

Q1, Q1, Q2, Q2

Outputs

Inputs

Outputs

SD

CD

CP

D

Q

LH

X

H

L

HL

X

L

H

LL

X

H

HH

L

HH

LL

H

HH

L

X

Q0

同様の部品番号 - 74LCX74MTC

メーカー	部品番号	データシート	部品情報
Fairchild Semiconductor	74LCX74MTC	824Kb / 14P	Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop
ON Semiconductor	74LCX74MTC	682Kb / 13P	Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs December 2013 Rev. 1.7.1
Fairchild Semiconductor	74LCX74MTCX	826Kb / 13P	74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs

More results

同様の説明 - 74LCX74MTC

メーカー	部品番号	データシート	部品情報
ON Semiconductor	74LCX74	682Kb / 13P	Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs December 2013 Rev. 1.7.1
Unisonic Technologies	U74LCX74	175Kb / 7P	LOW VOLTAGE DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP WITH 5V TOLERANT INPUTS
Fairchild Semiconductor	74LCX74MTCX	826Kb / 13P	74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs
Fairchild Semiconductor	74LCX74	826Kb / 13P	74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs
STMicroelectronics	74LCX74	433Kb / 17P	Low voltage CMOS dual D-Type Flip Flop with 5V tolerant inputs
STMicroelectronics	74LCX74	79Kb / 11P	LOW VOLTAGE CMOS DUAL D-TYPE FLIP FLOP WITH 5V TOLERANT INPUTS
ON Semiconductor	74LCX112	205Kb / 11P	Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs Revised February 2001
Fairchild Semiconductor	74LCX112	99Kb / 9P	Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs
	74LCX112MTCX	102Kb / 9P	Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs
	74LVX74	93Kb / 7P	Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop