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TS3DV642A0RUAR データシート(PDF) 4 Page - Texas Instruments |
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TS3DV642A0RUAR データシート(HTML) 4 Page - Texas Instruments |
4 / 17 page TS3DV642 SCDS343 – MAY 2013 www.ti.com ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage range –0.5 5.5 V VI/O Analog voltage range(2)(3)(4) All I/O –0.5 5.5 V VIN Digital input voltage range(2)(3) SEL1, SEL2,EN –0.5 5.5 V II/OK Analog port diode current VI/O < 0 –50 mA IIK Digital input clamp current VIN < 0 –50 mA II/O On-state switch current(5) –128 128 mA θJA Package thermal impedance(6) RUA package TBD °C/W Tstg Storage temperature range –65 150 °C (1) Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltages are with respect to ground, unless otherwise specified. (3) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. (4) VI and VO are used to denote specific conditions for VI/O. (5) II and IO are used to denote specific conditions for II/O. (6) The package thermal impedance is calculated in accordance with JESD 51-7. RECOMMENDED OPERATING CONDITIONS (1) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage 2.6 4.5 V VI/O Input/Output voltage 0 5.5 V TA Operating free-air temperature –40 85 °C (1) All unused control inputs of the device must be held at VDD or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. ELECTRICAL CHARACTERISTICS PARAMETER TEST CONDITIONS(1) MIN TYP(2) MAX UNIT PORT A D0 to D3 6.5 9.5 Ω VCC = 3 V, 1.5 V ≤ VI/O ≤ VCC, RON ON-state resistance II/O = –40 mA SCL, SDA, HPE, CEC 6 9.5 Ω VCC = 3 V, VI/O = 1.5 V and VCC, ON-state resistance RON(flat) (3) All I/O 1.5 Ω flatness II/O = –40 mA On-state resistance VCC = 3 V, 1.5 V ≤ VI/O ≤ VCC, ΔRON (4) match between high- D0 to D3 0.4 1 Ω II/O = –40 mA speed channels VCC = 0 V, VI/O = 0 to 3.6 V, IOFF Leakage under power off All outputs ±10 µA VIN = 0 V to 5.5 V PORT B D0 to D3 8.2 10.5 Ω VCC = 3 V, 1.5 V ≤ VI/O ≤ VCC, RON ON-state resistance II/O = -40 mA SCL, SDA, HPE, CEC 6 10.5 Ω VCC = 3 V, VI/O = 1.5 V and VCC, ON-state resistance RON(flat) (3) All I/O 1.5 Ω flatness II/O = –40 mA On-state resistance VCC = 3 V, 1.5 V ≤ VI/O ≤ VCC, ΔRON (4) match between high- D0 to D3 0.4 1 Ω II/O = –40 mA speed channels VCC = 0 V, VI/O = 0 V to 3.6 V, IOFF Leakage under power off All outputs ±10 µA VIN = V to 5.5 V (1) VI, VO, II, and IO refer to I/O pins, VIN refers to the control inputs (2) All typical values are at VCC = 3.3V (unless otherwise noted), TA = 25°C (3) RON(FLAT) is the difference of RON in a given channel at specified voltages. (4) ΔRON is the difference of RON from center port to any other ports. 4 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TS3DV642 |
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