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FM1808B データシート(PDF) 6 Page - Cypress Semiconductor

部品番号 FM1808B
部品情報  256Kb Bytewide 5V F-RAM Memory
Download  12 Pages
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メーカー  CYPRESS [Cypress Semiconductor]
ホームページ  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

FM1808B データシート(HTML) 6 Page - Cypress Semiconductor

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FM1808B – 256Kb Bytewide 5V F-RAM
Document Number: 001-86209 Rev. **
Page 6 of 12
Electrical Specifications
Absolute Maximum Ratings
Symbol
Description
Ratings
VDD
Power Supply Voltage with respect to VSS
-1.0V to +7.0V
VIN
Voltage on any pin with respect to VSS
-1.0V to +7.0V
and VIN < VDD+1.0V
TSTG
Storage Temperature
-55 C to + 125 C
TLEAD
Lead Temperature (Soldering, 10 seconds)
260 C
VESD
Electrostatic Discharge Voltage
- Human Body Model (AEC-Q100-002 Rev. E)
- Charged Device Model (AEC-Q100-011 Rev. B)
- Machine Model (AEC-Q100-003 Rev. E)
4kV
1.25kV
300V
Package Moisture Sensitivity Level
MSL-2
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating
only, and the functional operation of the device at these or any other conditions above those listed in the operational section of this
specification is not implied. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability.
DC Operating Conditions (TA = -40 C to + 85 C, VDD = 4.5V to 5.5V unless otherwise specified)
Symbol
Parameter
Min
Typ
Max
Units
Notes
VDD
Power Supply
4.5
5.0
5.5
V
IDD
VDD Supply Current
-
15
mA
1
ISB1
Standby Current (TTL)
-
1.8
mA
2
ISB2
Standby Current (CMOS)
25
50
A
3
ILI
Input Leakage Current
-
1
A
4
ILO
Output Leakage Current
-
1
A
4
VIH
Input High Voltage
2.0
VDD+0.3
V
VIL
Input Low Voltage
-0.3
0.8
V
VOH1
Output High Voltage (IOH = -2 mA)
2.4
V
VOH2
Output High Voltage (IOH = -100 A)
VDD-0.2
V
VOL1
Output Low Voltage (IOL = 4.2 mA)
0.4
V
VOL2
Output Low Voltage (IOL = 150 A)
0.2
V
Notes
1.
VDD = 5.5V, /CE cycling at minimum cycle time. All inputs at CMOS levels, all outputs unloaded.
2.
VDD = 5.5V, /CE at VIH, All other pins at TTL levels
3.
VDD = 5.5V, /CE at VIH, All other pins at CMOS levels (0.2V or VDD-0.2V).
4.
VIN, VOUT between VDD and VSS.


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