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HUFA75429D3ST データシート(PDF) 8 Page - Fairchild Semiconductor |
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HUFA75429D3ST データシート(HTML) 8 Page - Fairchild Semiconductor |
8 / 11 page ©2002 Fairchild Semiconductor Corporation Rev. A PSPICE Electrical Model .SUBCKT HUFA75429D3S 2 1 3 rev February 2002 CA 12 8 1.9e-9 CB 15 14 1.9e-9 CIN 6 8 9.7e-10 DBODY 7 5 DBODYMOD DBREAK 5 11 DBREAKMOD DPLCAP 10 5 DPLCAPMOD EBREAK 11 7 17 18 65 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 6 8 1 EVTHRES 6 21 19 8 1 EVTEMP 20 6 18 22 1 IT 8 17 1 LGATE 1 9 3.54e-9 LDRAIN 2 5 1e-9 LSOURCE 3 7 2.21e-9 RLGATE 1 9 35.4 RLDRAIN 2 5 10 RLSOURCE 3 7 22.1 MMED 16 6 8 8 MMEDMOD MSTRO 16 6 8 8 MSTROMOD MWEAK 16 21 8 8 MWEAKMOD RBREAK 17 18 RBREAKMOD 1 RDRAIN 50 16 RDRAINMOD 6.5e-3 RGATE 9 20 2 RSLC1 5 51 RSLCMOD 1e-6 RSLC2 5 50 1e3 RSOURCE 8 7 RSOURCEMOD 1.1e-2 RVTHRES 22 8 RVTHRESMOD 1 RVTEMP 18 19 RVTEMPMOD 1 S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD VBAT 22 19 DC 1 ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*100),5))} .MODEL DBODYMOD D (IS = 1.6e-12 N=1.02 RS = 8.1e-3 TRS1 = 3e-3 TRS2 = 2e-6 CJO = 1.43e-9 TT = 3e-8 M = 0.53 XTI=5.5) .MODEL DBREAKMOD D (RS = 2e-1 TRS1 = 1e-3 TRS2 = -8.9e-6) .MODEL DPLCAPMOD D (CJO = 1.4e-9 IS = 1e-30 N = 10 M = 0.79) .MODEL MmedMOD NMOS (VTO=3 KP=4.5 IS=1e-30 N=10 TOX=1 L=1u W=1u RG=2) .MODEL MstroMOD NMOS (VTO=3.6 KP=40 IS=1e-30 N=10 TOX=1 L=1u W=1u) .MODEL MweakMOD NMOS (VTO=2.66 KP=0.05 IS=1e-30 N=10 TOX=1 L=1u W=1u RG=2e1 RS=0.1) .MODEL RBREAKMOD RES (TC1 =1.2e-3 TC2 = 1e-7) .MODEL RDRAINMOD RES (TC1 = 1.2e-2 TC2 = 2.3e-5) .MODEL RSLCMOD RES (TC1 = 8e-3 TC2 = 1e-6) .MODEL RSOURCEMOD RES (TC1 = 1e-3 TC2 = 8e-6) .MODEL RVTEMPMOD RES (TC1 = -3e-3 TC2 = -2e-6) .MODEL RVTHRESMOD RES (TC1 = -2e-3 TC2 = -1e-5) .MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -8 VOFF= -3.5) .MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -3.5 VOFF= -8) .MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -1.1 VOFF= 0.5) .MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.5 VOFF= -1.1) .ENDS Note: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley. 18 22 + - 6 8 + - 5 51 19 8 + - 17 18 6 8 + - 5 8 + - RBREAK RVTEMP VBAT RVTHRES IT 17 18 19 22 12 13 15 S1A S1B S2A S2B CA CB EGS EDS 14 8 13 8 14 13 MWEAK EBREAK DBODY RSOURCE SOURCE 11 7 3 LSOURCE RLSOURCE CIN RDRAIN EVTHRES 16 21 8 MMED MSTRO DRAIN 2 LDRAIN RLDRAIN DBREAK DPLCAP ESLC RSLC1 10 5 51 50 RSLC2 1 GATE RGATE EVTEMP 9 ESG LGATE RLGATE 20 + - + - + - 6 |
同様の部品番号 - HUFA75429D3ST |
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同様の説明 - HUFA75429D3ST |
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