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ML2003 データシート(PDF) 4 Page - Fairchild Semiconductor

部品番号 ML2003
部品情報  Logarithmic Gain/Attenuator
Download  11 Pages
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メーカー  FAIRCHILD [Fairchild Semiconductor]
ホームページ  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

ML2003 データシート(HTML) 4 Page - Fairchild Semiconductor

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ML2003, ML2004
PRODUCT SPECIFICATION
4
REV. 1.1.1 3/19/01
Notes:
1. Absolute maximum ratings are limits beyond which the life of the integrated circuit may be impaired. All voltages unless
otherwise specified are measured with respect to ground.
2. 0°C to +70°C and –40°C to +85°C operating temperature range devices are 100% tested with temperature limits guaranteed
by 100% testing, sampling, or by correlation with worst-case test conditions.
3. Typicals are parametric norm at 25°C.
4. Parameter guaranteed and 100% production tested.
5. Parameter guaranteed. Parameters not 100% tested are not in outgoing quality level calculation.
VOH
Digital Output High
Voltage
4IOH = -1mA
4.0
V
INS
Input Current, SER/
PAR
4VIH = GND
-5
-100
µA
IND
Input Current,
All Digital Inputs
Except SER/PER
4VIH = VCC
5
100
µA
ICC
VCC Supply Current
4
No output load, VIL = GND,
VIH = VCC, VIN = 0
4
mA
ISS
VSS Supply Current
4
No output load, VIL = GND,
VIH = VCC, VIN = 0
-4
mA
ICCP
VCC Supply Current,
Powerdown Mode
4
No output load, VIL = GND,
VIH = VCC
0.5
mA
ISSP
VSS Supply Current
Powerdown Mode
4
No output load, VIL = GND,
VIH = VCC
-0.1
mA
AC Characteristics
tSET
VOUT Settling Time
4
VIN = 0.185V. Change gain from –24 to
+24dB. Measure from LATI rising edge to
when VOUT settles to within 0.05dB of final
value.
20
µs
tSTEP
VOUT Step Response
4
Gain = +24dB. VIN = -0.185 to +0.185V
step. Measure when VOUT settles to within
0.05dB of final value.
20
µs
tSCK
SCK On/Off Period
4
250
ns
tS
SID Data Setup Time
4
50
ns
tH
SID Data Hold Time
4
50
ns
tD
SOD Data Delay
4
0
125
ns
tIPW
LATI Pulse Width
4
50
ns
tOPW
LATO Pulse Width
4
50
ns
tIS, tOS LATI, LATO Setup
Time
450
ns
tIH,
tOH
LATI, LATO Hold
Time
550
ns
tPLD
SOD Parallel Load
Delay
4
0
125
ns
Electrical Characteristics (continued)
Unless otherwise specified TA = TMIN to TMAX, VCC = 5V ± 10%, VSS = -5V ±10%, Data Word: ATTEN/GAIN = 1,
Other Bits = 0(0dB Ideal Gain), CL = 100pF, RL = 600
Ω, SCK = LATI = LATO = 0, dBm measurements use 600Ω as
reference load, digital timing measured at 1.4 V, CL = 100pF or SOD.
Symbol
Parameter
Notes
Conditions
Min. Typ.3 Max.
Units


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