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ML2035 データシート(PDF) 2 Page - Fairchild Semiconductor |
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ML2035 データシート(HTML) 2 Page - Fairchild Semiconductor |
2 / 9 page ML2035 2 REV. 1.0 10/10/2000 PIN CONFIGURATION PIN DESCRIPTION PIN NAME FUNCTION 1VSS Negative supply (-5V). 2 SCK Serial clock. Digital input which clocks in serial data on its rising edges. 3 SID Serial input data which programs the frequency of VOUT. 4 LATI Digital input which latches serial data into the internal data latch on falling edges. PIN NAME FUNCTION 5VCC Positive supply (5V). 6VOUT Analog output. VOUT swing is ±VCC/2. 7 GND Ground. All inputs and outputs are referenced to this point. 8 CLK IN Clock input. The internal clock can be generated by tying a 3 to 12MHz crystal from this pin to GND, or applying a digital clock signal directly to the pin. 1 2 3 4 8 7 6 5 VSS SCK SID LATI CLK IN GND VOUT VCC TOP VIEW ML2035 8-Pin PDIP (P08) |
同様の部品番号 - ML2035 |
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同様の説明 - ML2035 |
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