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AD9979BCPZ データシート(PDF) 3 Page - Analog Devices

部品番号 AD9979BCPZ
部品情報  14-Bit, CCD Signal Processor with Precision Timing Core
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

AD9979BCPZ データシート(HTML) 3 Page - Analog Devices

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AD9979
Rev. C | Page 3 of 56
SPECIFICATIONS
Table 1.
Parameter
Min
Typ
Max
Unit
TEMPERATURE RANGE
Operating
−25
+85
°C
Storage
−65
+150
°C
POWER SUPPLY VOLTAGE
AVDD (AFE, Timing Core)
1.6
1.8
2.0
V
RGVDD (RG, HL Drivers)
2.7
3.3
3.6
V
HVDD (H1 to H4 Drivers)
2.7
3.3
3.6
V
DVDD (Internal Digital Supply)
1.6
1.8
2.0
V
DRVDD (Parallel Data Output Drivers )
1.6
3.0
3.6
V
IOVDD (I/O Supply Without the Use of LDO)
1.6
1.8
3.6
V
POWER SUPPLY CURRENTS—65 MHz OPERATION
AVDD (1.8 V)
48
mA
RGVDD (3.3 V, 20 pF RG Load, 20 pF HL Load)
8
mA
HVDD1 (3.3 V, 200 pF Total Load on H1 to H4)
40
mA
DVDD (1.8 V)
13
mA
DRVDD (3.0 V)
4
mA
IOVDD (1.8 V)
2
mA
POWER SUPPLY CURRENTS—STANDBY MODE OPERATION
Reference Standby
10
mA
Total Shutdown
0.5
mA
LDO2
IOVDD (I/O Supply When Using LDO)
2.5
3.0
3.6
V
Output Voltage
1.8
1.85
1.9
V
Output Current
60
mA
CLOCK RATE (CLI)
8
65
MHz
1 The total power dissipated by the HVDD (or RGVDD) supply can be approximated using the equation
Total HVDD Power = [CLOAD × HVDD × Pixel Frequency] × HVDD
where CLOAD is the total capacitance seen by all H outputs.
Reducing the capacitive load and/or reducing the HVDD supply reduces the power dissipation.
2 LDO can be used to supply AVDD and DVDD only.


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