P-LFBGA-80-2 datasheet(4/252 Pages) INFINEON

部品番号	P-LFBGA-80-2

部品情報	2 Channel Serial Optimized Communication Controller for HDLC/PPP

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メーカー	INFINEON [Infineon Technologies AG]

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PEB 20525

Revision History:

2000-09-14

DS 1

Previous Version:

PASSAT V1.1 Preliminary Data Sheet, 09.99, DS2

Page

(previous

Version)

Page

(current

Version)

Subjects (major changes since last revision)

33-35

36-38

Correction: signal ’OSR’ is multiplexed with signal ’CD’, signal

’OST’ is multiplexed with ’CTS’ (was vice versa)

81

84

corrected HDLC receive address recognition table

n.a.

232, 235

Added timing diagram for external DMA support signals

n.a.

232

Added address timing diagram for Intel multiplexed mode

(signal ALE)

222

226

Chapter "Electrical Characteristics" updated with final

characterization results.

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