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EP2C20F484C6N データシート(PDF) 44 Page - Altera Corporation |
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EP2C20F484C6N データシート(HTML) 44 Page - Altera Corporation |
44 / 168 page 2–32 Altera Corporation Cyclone II Device Handbook, Volume 1 February 2007 Embedded Multipliers Figure 2–17. M4K RAM Block LAB Row Interface f For more information on Cyclone II embedded memory, see the Cyclone II Memory Blocks chapter in Volume 1 of the Cyclone II Device Handbook. Embedded Multipliers Cyclone II devices have embedded multiplier blocks optimized for multiplier-intensive digital signal processing (DSP) functions, such as finite impulse response (FIR) filters, fast Fourier transform (FFT) functions, and discrete cosine transform (DCT) functions. You can use the embedded multiplier in one of two basic operational modes, depending on the application needs: ■ One 18-bit multiplier ■ Up to two independent 9-bit multipliers dataout M4K RAM Block datain address 16 16 16 Direct link interconnect from adjacent LAB Direct link interconnect to adjacent LAB Direct link interconnect from adjacent LAB Direct link interconnect to adjacent LAB M4K RAM Block Local Interconnect Region C4 Interconnects R4 Interconnects LAB Row Clocks Clocks Byte enable Control Signals 6 |
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同様の説明 - EP2C20F484C6N |
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