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LM20123MHX データシート(PDF) 2 Page - Texas Instruments

部品番号 LM20123MHX
部品情報  LM20123/LM20123Q 3A, 1.5MHz PowerWise Synchronous Buck Regulator
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メーカー  TI [Texas Instruments]
ホームページ  http://www.ti.com
Logo TI - Texas Instruments

LM20123MHX データシート(HTML) 2 Page - Texas Instruments

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FB
PGOOD
COMP
NC
PVIN
PVIN
SW
SS/TRK
AVIN
VCC
EN
PGND
PGND
SW
AGND
NC
EP
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
LM20123
SNVS524E – OCTOBER 2007 – REVISED MARCH 2013
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
Connection Diagram
Top View
See Package Number PWP0016A
PIN DESCRIPTIONS
Pin #
Name
Description
1
SS/TRK
Soft-Start or Tracking control input. An internal 5 µA current source charges an external capacitor to set the
Soft-Start ramp rate. If driven by a external source less than 800 mV, this pin overrides the internal reference
that sets the output voltage. If left open, an internal 1ms Soft-Start ramp is activated.
2
FB
Feedback input to the error amplifier from the regulated output. This pin is connected to the inverting input of
the internal transconductance error amplifier. An 800 mV reference connected to the non-inverting input of the
error amplifier sets the closed loop regulation voltage at the FB pin.
3
PGOOD
Power good output signal. Open drain output indicating the output voltage is regulating within tolerance. A pull-
up resistor of 10 k
Ω to 100 kΩ is recommend for most applications.
4
COMP
External compensation pin. Connect a resistor and capacitor to this pin to compensate the device.
5,16
NC
These pins must be connected to GND to ensure proper operation.
6,7
PVIN
Input voltage to the power switches inside the device. These pins should be connected together at the device.
A low ESR capacitor should be placed near these pins to stabilize the input voltage.
8,9
SW
Switch pin. The PWM output of the internal power switches.
10,11
PGND
Power ground pin for the internal power switches.
12
EN
Precision enable input for the device. An external voltage divider can be used to set the device turn-on
threshold. If not used the EN pin should be connected to PVIN.
13
VCC
Internal 2.7V sub-regulator. This pin should be bypassed with a 1 µF ceramic capacitor.
14
AVIN
Analog input supply that generates the internal bias. Must be connected to VIN through a low pass RC filter.
15
AGND
Quiet analog ground for the internal bias circuitry.
EP
Exposed Pad
Exposed metal pad on the underside of the package with a weak electrical connection to ground. It is
recommended to connect this pad to the PC board ground plane in order to improve heat dissipation.
2
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Copyright © 2007–2013, Texas Instruments Incorporated
Product Folder Links: LM20123


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