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AD2S83IPZ データシート(PDF) 6 Page - Analog Devices

部品番号 AD2S83IPZ
部品情報  Variable Resolution, Resolver-to-Digital Converter
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

AD2S83IPZ データシート(HTML) 6 Page - Analog Devices

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AD2S83
REV. E
–6–
Bit Weight Table
Binary
Resolution
Degrees
Minutes
Seconds
Bits (N)
(N
N)
/Bit
/Bit
/Bit
0
1
360.0
21600.0
1296000.0
1
2
180.0
10800.0
648000.0
2
4
90.0
5400.0
324000.0
3
8
45.0
2700.0
162000.0
4
16
22.5
1350.0
81000.0
5
32
11.25
675.0
40500.0
6
64
5.625
337.5
20250.0
7
128
2.8125
168.75
10125.0
8
256
1.40625
84.375
5062.5
9
512
0.703125
42.1875
2531.25
10
1024
0.3515625
21.09375
1265.625
11
2048
0.1757813
10.546875
632.8125
12
4096
0.0878906
5.273438
316.40625
13
8192
0.0439453
2.636719
158.20313
14
16384
0.0219727
1.318359
79.10156
15
32768
0.0109836
0.659180
39.55078
16
65536
0.0054932
0.329590
19.77539
17
131072
0.0027466
0.164795
9.88770
18
262144
0.0013733
0.082397
4.94385
CONNECTING THE CONVERTER
The power supply voltages connected to +VS and –VS pins
should be +12 V dc and –12 V dc and must not be reversed.
The voltage applied to VL can be +5 V dc to +VS.
It is recommended that the decoupling capacitors are connected
in parallel between the power lines +VS, –VS and ANALOG
GROUND adjacent to the converter. Recommended values are
100 nF (ceramic) and 10
µF (tantalum). Also capacitors of
100 nF and 10
µF should be connected between +VL and
DIGITAL GROUND adjacent to the converter.
When more than one converter is used on a card, separate de-
coupling capacitors should be used for each converter.
The resolver connections should be made to the SIN and COS
inputs, REFERENCE INPUT and SIGNAL GROUND as
shown in Figure 11 and described in the Connecting the
Resolver section.
The two signal ground wires from the resolver should be joined
at the SIGNAL GROUND pin of the converter to minimize the
coupling between the sine and cosine signals. For this reason it
is also recommended that the resolver is connected using indi-
vidually screened twisted pair cables with the sine, cosine and
reference signals twisted separately.
SIGNAL GROUND and ANALOG GROUND are connected
internally. ANALOG GROUND and DIGITAL GROUND
must be connected externally and as close to the converter as
possible.
The external components required should be connected as
shown in Figure 1.
CONVERTER RESOLUTION
Two major areas of the AD2S83 specification can be selected by
the user to optimize the total system performance. The resolu-
tion of the digital output is set by the logic state of the inputs
SC1 and SC2 to be 10, 12, 14 or 16 bits; and the dynamic char-
acteristics of bandwidth and tracking rate are selected by the
choice of external components.
The choice of the resolution will affect the values of R4 and R6
which scale the inputs to the integrator and the VCO respec-
tively (see Component Selection section). If the resolution is
changed, then new values of R4 and R6 must be switched into
the circuit.
Note: When changing resolution under dynamic conditions, do
it when the BUSY is low, i.e., when data is not changing.
A1
A2
SEGMENT
SWITCHING
RIPPLE
CLOCK
TRACKING
RATE
SELECTION
VELOCITY
SIGNAL
R5
C4
C5
INTEGRATOR
I/P
BANDWIDTH
SELECTION
R8
–12V
+12V
OFFSET ADJUST
R9
R3
C3
REFERENCE
I/P
HF FILTER
R2
C2
C1
R1
DEMOD
O/P
PHASE
SENSITIVE
DETECTOR
INTEGRATOR
O/P
DIRECTION
BUSY
DIG
GND
16 DATA BITS
SC1 SC2
DATA
LOAD
BYTE
SELECT
5V
+12V
–12V
GND
COS
SIG GND
SIN
AC ERROR O/P
AD2S83
VCO
O/P
VCO
I/P
C7
150pF
VCO + DATA
TRANSFER
LOGIC
A3
R4
R7
3K3
C6
390pF
OUTPUT DATA LATCH
R - 2R DAC
16-BIT UP/DOWN COUNTER
R6
INHIBIT
ENABLE
Figure 1. Connection Diagram


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