データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

AM29DL400BT-120EEB データシート(PDF) 8 Page - Advanced Micro Devices

部品番号 AM29DL400BT-120EEB
部品情報  4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
Download  42 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  AMD [Advanced Micro Devices]
ホームページ  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM29DL400BT-120EEB データシート(HTML) 8 Page - Advanced Micro Devices

Back Button AM29DL400BT-120EEB Datasheet HTML 4Page - Advanced Micro Devices AM29DL400BT-120EEB Datasheet HTML 5Page - Advanced Micro Devices AM29DL400BT-120EEB Datasheet HTML 6Page - Advanced Micro Devices AM29DL400BT-120EEB Datasheet HTML 7Page - Advanced Micro Devices AM29DL400BT-120EEB Datasheet HTML 8Page - Advanced Micro Devices AM29DL400BT-120EEB Datasheet HTML 9Page - Advanced Micro Devices AM29DL400BT-120EEB Datasheet HTML 10Page - Advanced Micro Devices AM29DL400BT-120EEB Datasheet HTML 11Page - Advanced Micro Devices AM29DL400BT-120EEB Datasheet HTML 12Page - Advanced Micro Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 8 / 42 page
background image
8
Am29DL400B
P R E L I M I NARY
DEVICE BUS OPERATIONS
This section describes the requirements and use of the
device bus operations, which are initiated through the
internal command register. The command register it-
self does not occupy any addressable memory loca-
tion. The regist er is a latch used to store the
commands, along with the address and data informa-
tion needed to execute the command. The contents of
the register serve as inputs to the internal state ma-
chine. The state machine outputs dictate the function of
the device. Table 1 lists the device bus operations, the
inputs and control levels they require, and the resulting
output. The following subsections describe each of
these operations in further detail.
Table 1.
Am29DL400B Device Bus Operations
Legend:
L = Logic Low = VIL, H = Logic High = VIH, VID = 12.0 ± 0.5 V, X = Don’t Care, AIN = Address In, DIN = Data In, DOUT = Data Out
Notes:
1. Addresses are A17:A0 in word mode (BYTE# = VIH), A17:A-1 in byte mode (BYTE# = VIL).
2. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector
Protection/Unprotection” section.
Word/Byte Configuration
The BYTE# pin controls whether the device data I/O
pins operate in the byte or word configuration. If the
BYTE# pin is set at logic ‘1’, the device is in word con-
figuration, DQ0-15 are active and controlled by CE#
and OE# .
If the BYTE# pin is set at logic ‘0’, the device is in byte
configuration, and only data I/O pins DQ0–DQ7 are ac-
tive and controlled by CE# and OE#. The data I/O pins
DQ8–DQ14 are tri-stated, and the DQ15 pin is used as
an input for the LSB (A-1) address function.
Requirements for Reading Array Data
To read array data from the outputs, the system must
drive the CE# and OE# pins to VIL. CE# is the power
control and selects the device. OE# is the output con-
trol and gates array data to the output pins. WE# should
remain at VIH. The BYTE# pin determines whether the
device outputs array data in words or bytes.
The internal state machine is set for reading array
data upon device power-up, or after a hardware reset.
This ensures that no spurious alteration of the mem-
ory content occurs during the power transition. No
command is necessary in this mode to obtain array
data. Standard microprocessor read cycles that as-
sert valid addresses on the device address inputs pro-
duce valid data on the device data outputs. Each bank
remains enabled for read access until the command
register contents are altered.
See “Reading Array Data” for more information. Refer
to the AC Read-Only Operations table for timing spec-
ifications and to Figure 13 for the timing diagram. ICC1
in the DC Characteristics table represents the active
current specification for reading array data.
Writing Commands/Command Sequences
To write a command or command sequence (which in-
cludes programming data to the device and erasing
Operation
CE#
OE# WE# RESET#
Addresses
(Note 1)
DQ0–
DQ7
DQ8–DQ15
BYTE#
= VIH
BYTE#
= VIL
Read
L
L
H
H
AIN
DOUT
DOUT
DQ8–DQ14 = High-Z,
DQ15 = A-1
Write
L
H
L
H
AIN
DIN
DIN
Standby
VCC ±
0.3 V
XX
VCC ±
0.3 V
X
High-Z
High-Z
High-Z
Output Disable
L
H
H
H
X
High-Z
High-Z
High-Z
Reset
X
X
X
L
X
High-Z
High-Z
High-Z
Sector Protect (Note 2)
L
H
L
VID
Sector Address,
A6 = L, A1 = H,
A0 = L
DIN
XX
Sector Unprotect (Note 2)
L
H
L
VID
Sector Address,
A6 = H, A1 = H,
A0 = L
DIN
XX
Temporary Sector Unprotect
X
X
X
VID
AIN
DIN
DIN
High-Z


同様の部品番号 - AM29DL400BT-120EEB

メーカー部品番号データシート部品情報
logo
Advanced Micro Devices
AM29DL400BT-120EE AMD-AM29DL400BT-120EE Datasheet
1Mb / 47P
   4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
More results

同様の説明 - AM29DL400BT-120EEB

メーカー部品番号データシート部品情報
logo
Advanced Micro Devices
AM29DL400B AMD-AM29DL400B_05 Datasheet
1Mb / 47P
   4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
AM29LV400B AMD-AM29LV400B_03 Datasheet
382Kb / 14P
   4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only, Boot Sector Flash Memory
AM29LV400 AMD-AM29LV400 Datasheet
516Kb / 40P
   4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
AM29LV400B AMD-AM29LV400B Datasheet
47Kb / 7P
   4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
logo
SPANSION
AM29LV400BT-90EC SPANSION-AM29LV400BT-90EC Datasheet
1Mb / 48P
   4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
AM29LV400BB-90EC SPANSION-AM29LV400BB-90EC Datasheet
1Mb / 48P
   4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
AM29LV400BT-70EI SPANSION-AM29LV400BT-70EI Datasheet
1Mb / 48P
   4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
AM29LV400BT-70SC SPANSION-AM29LV400BT-70SC Datasheet
1Mb / 48P
   4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
logo
Advanced Micro Devices
AM29DL800B AMD-AM29DL800B Datasheet
580Kb / 43P
   8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
AM29DL800B AMD-AM29DL800B_06 Datasheet
1Mb / 46P
   8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42


データシート ダウンロード

Go To PDF Page


リンク URL




プライバシーポリシー
ALLDATASHEET.JP
ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com