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EP20K400 データシート(PDF) 31 Page - Altera Corporation

部品番号 EP20K400
部品情報  Programmable Logic Device Family
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メーカー  ALTERA [Altera Corporation]
ホームページ  http://www.altera.com
Logo ALTERA - Altera Corporation

EP20K400 データシート(HTML) 31 Page - Altera Corporation

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APEX 20K Programmable Logic Device Family Data Sheet
Figure 18. Deep Memory Block Implemented with Multiple ESBs
The ESB implements two forms of dual-port memory: read/write clock
mode and input/output clock mode. The ESB can also be used for
bidirectional, dual-port memory applications in which two ports read or
write simultaneously. To implement this type of dual-port memory, two
or four ESBs are used to support two simultaneous reads or writes. This
functionality is shown in Figure 19.
Figure 19. APEX 20K ESB Implementing Dual-Port RAM
ESB
ESB
ESB
to System Logic
Address Decoder
Port A
Port B
address_a[]
address_b[]
data_a[]
data_b[]
we_a
we_b
clkena_a
clkena_b
Clock A
Clock B


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