LM25085A_14 datasheet(2/31 Pages) TI1

部品番号	LM25085A

部品情報	42V Constant On-Time PFET Buck Switching Controller with 0.9V Reference

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8

7

6

5

4

3

2

1

Exposed Pad on Bottom

Connect to Ground

FB

GND

ADJ

PGATE

ISEN

VCC

RT

VIN

1

2

3

4

5

8

7

6

FB

PGATE

ISEN

GND

VCC

ADJ

RT

VIN

1

2

3

4

5

8

7

6

Exposed Pad on Bottom

Connect to Ground

FB

PGATE

ISEN

GND

VCC

ADJ

RT

VIN

LM25085A

SNVS601A – JANUARY 2009 – REVISED MARCH 2009

www.ti.com

Connection Diagram

Figure 1. Top View

8-Lead MSOP-EP

Figure 2. Top View

8-Lead MSOP

Figure 3. Top View

8-Lead LLP

Pin Functions

Pin Descriptions

Name

Description

Application Information

No.

1

ADJ

Current Limit Adjust

The current limit threshold is set by an external resistor from VIN to ADJ in

conjunction with the external sense resistor or the PFET’s RDS(ON).

2

RT

On-time control and shutdown

An external resistor from VIN to RT sets the buck switch on-time and switching

frequency. Grounding this pin shuts down the controller.

3

FB

Voltage Feedback from the

Input to the regulation and over-voltage comparators. The regulation level is 0.9V.

regulated output

4

GND

Circuit Ground

Ground reference for all internal circuitry

5

ISEN

Current sense input for current

Connect to the PFET drain when using RDS(ON) current sense. Connect to the PFET

limit detection.

source and the sense resistor when using a current sense resistor.

6

PGATE

Gate Driver Output

Connect to the gate of the external PFET.

7

VCC

Output of the gate driver bias

Output of the negative voltage regulator (relative to VIN) that biases the PFET gate

regulator

driver. A low ESR capacitor is required from VIN to VCC, located as close as

possible to the pins.

8

VIN

Input supply voltage

The operating input range is from 4.5V to 42V. A low ESR bypass capacitor must be

located as close as possible to the VIN and GND pins.

2

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