SYSTEM

CONTROLLER

LM3205

0.8V to 3.6V

L1

3.3 PH

C1*

10 PF

C2

4.7 PF

SW

FB

EN

PGND

SGND

DAC

ON/OFF

2.7V to 5.5V

LM3205

www.ti.com

SNVS388D – JULY 2005 – REVISED MAY 2009

Figure 5. Typical Operating System Circuit

CIRCUIT OPERATION

Referring to Figure 1 and Figure 4, the LM3205 operates as follows. During the first part of each switching cycle,

the control block in the LM3205 turns on the internal PFET (P-channel MOSFET) switch. This allows current to

flow from the input through the inductor to the output filter capacitor and load. The inductor limits the current to a

cycle, the controller turns the PFET switch off, blocking current flow from the input, and then turns the NFET (N-

channel MOSFET) synchronous rectifier on. In response, the inductor’s magnetic field collapses, generating a

voltage that forces current from ground through the synchronous rectifier to the output filter capacitor and load.

As the stored energy is transferred back into the circuit and depleted, the inductor current ramps down with a

when low, smoothing the voltage across the load.

The output voltage is regulated by modulating the PFET switch on time to control the average current sent to the

load. The effect is identical to sending a duty-cycle modulated rectangular wave formed by the switch and

synchronous rectifier at SW to a low-pass filter formed by the inductor and output filter capacitor. The output

voltage is equal to the average voltage at the SW pin.

While in operation, the output voltage is regulated by switching at a constant frequency and then modulating the

energy per cycle to control power to the load. Energy per cycle is set by modulating the PFET switch on-time

pulse width to control the peak inductor current. This is done by comparing the signal from the current-sense

amplifier with a slope compensated error signal from the voltage-feedback error amplifier. At the beginning of

each cycle, the clock turns on the PFET switch, causing the inductor current to ramp up. When the current sense

signal ramps past the error amplifier signal, the PWM comparator turns off the PFET switch and turns on the

NFET synchronous rectifier, ending the first part of the cycle. If an increase in load pulls the output down, the

error amplifier output increases, which allows the inductor current to ramp higher before the comparator turns off

the PFET. This increases the average current sent to the output and adjusts for the increase in the load.

Before appearing at the PWM comparator, a slope compensation ramp from the oscillator is subtracted from the

error signal for stability of the current feedback loop. The minimum on time of PFET is 50ns (typ.)

SHUTDOWN MODE

Setting the EN digital pin low (<0.5V) places the LM3205 in a 0.01µA (typ.) Shutdown mode. During shutdown,

the PFET switch, NFET synchronous rectifier, reference voltage source, control and bias circuitry of the LM3205

are turned off. Setting EN high (>1.2V) enables normal operation.

EN should be set low to turn off the LM3205 during power-up and under voltage conditions when the power

supply is less than the 2.7V minimum operating voltage. The LM3205 is designed for compact portable

applications, such as mobile phones. In such applications, the system controller determines power supply

sequencing and requirements for small package size outweigh the additional size required for inclusion of UVLO

(Under Voltage Lock-Out) circuitry.

Copyright © 2005–2009, Texas Instruments Incorporated

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