ADC08060 datasheet(5/29 Pages) TI1

部品番号	ADC08060

部品情報	8-Bit, 20 MSPS to 60 MSPS, 1.3 m W/MSPS A/D Converter with Internal Sampleand Hold

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ADC08060

www.ti.com

SNAS120H – OCTOBER 2000 – REVISED MARCH 2013

Converter Electrical Characteristics

The following specifications apply for VA = DR VD = +3.0VDC, VRT = +1.9V, VRB = 0.3V, CL = 10 pF, fCLK = 60 MHz at 50% duty

cycle. Boldface limits apply for TJ = TMIN to TMAX: all other limits TA = 25°C

(1) (2) (3)

Units

Symbol

Parameter

Conditions

Typical (4)

Limits (4)

(Limits)

DC ACCURACY

INL

Integral Non-Linearity

±0.5

±1.3

LSB (max)

+1.0

LSB (max)

DNL

Differential Non-Linearity

±0.4

−0.9

LSB (min)

Missing Codes

0

(max)

FSE

Full Scale Error

18

±28

mV (max)

ZSE

Zero Scale Offset Error

26

±35

mV (max)

ANALOG INPUT AND REFERENCE CHARACTERISTICS

VRB

V (min)

VIN

Input Voltage

1.6

VRT

V (max)

(CLK LOW)

3

pF

CIN

VIN Input Capacitance

VIN = 0.75V +0.5 Vrms

(CLK HIGH)

4

pF

RIN

RIN Input Resistance

>1

M

Ω

BW

Full Power Bandwidth

200

MHz

VA

V (max)

VRT

Top Reference Voltage

1.9

1.0

V (min)

VRT − 1.0

V (max)

VRB

Bottom Reference Voltage

0.3

0

V (min)

1.0

V (min)

VRT - VRB Reference Delta

1.6

2.3

V (max)

150

Ω (min)

RREF

Reference Ladder Resistance

VRT to VRB

220

300

Ω (max)

5.3

mA (min)

IREF

Reference Ladder Current

7.3

10.6

mA (max)

(1)

The Electrical characteristics tables list ensured specifications under the listed Recommended Conditions except as otherwise modified

or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations for room temperature only

and are not ensured.

(2)

The analog inputs are protected as shown below. Input voltage magnitudes up to VA + 300 mV or to 300 mV below GND will not

damage this device. However, errors in the A/D conversion can occur if the input goes above DR VD or below GND by more than 100

mV. For example, if VA is 2.7VDC the full-scale input voltage must be ≤2.6VDC to ensure accurate conversions.

(3)

To ensure accuracy, it is required that VA and DR VD be well bypassed. Each supply pin must be decoupled with separate bypass

capacitors.

(4)

Typical figures are at TJ = 25°C, and represent most likely parametric norms at specific conditions at the time of product characterization

and are not ensured. Test limits are specified to TI's AOQL (Average Outgoing Quality Level).

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Product Folder Links: ADC08060

同様の部品番号 - ADC08060

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同様の説明 - ADC08060

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