74LVC138A

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Product data sheet

Rev. 5 — 19 October 2011

3 of 16

NXP Semiconductors

74LVC138A

3-to-8 line decoder/demultiplexer; inverting

5.

Pinning information

5.1 Pinning

5.2 Pin description

(1) This is not a supply pin. The substrate is attached to this

pad using conductive die attach material. There is no

electrical or mechanical requirement to solder this pad.

However, if it is soldered, the solder land should remain

floating or be connected to GND.

Fig 4.

Pin configuration for SO16 and (T)SSOP16

Fig 5.

Pin configuration for DHVQFN16

138

A0

A1

Y0

A2

Y1

E1

Y2

E2

Y3

E3

Y4

Y7

Y5

GND

Y6

001aad033

1

2

3

4

5

6

7

8

10

9

12

11

14

13

16

15

001aad035

138

Y7

Y5

E3

Y4

E2

Y3

E1

Y2

A2

Y1

A1

Y0

Transparent top view

7

10

6

11

5

12

4

13

3

14

2

15

terminal 1

index area

Table 2.

Pin description

Symbol

Pin

Description

A0

1

address input

A1

2

address input

A2

3

address input

E1

4

enable input (active LOW)

E2

5

enable input (active LOW)

E3

6

enable input (active HIGH)

GND

8

ground (0 V)

Y[0:7]

15, 14, 13, 12, 11, 10, 9, 7

output

16

supply voltage