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ML4824 データシート(PDF) 1 Page - Fairchild Semiconductor

部品番号 ML4824
部品情報  Power Factor Correction and PWM Controller Combo
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メーカー  FAIRCHILD [Fairchild Semiconductor]
ホームページ  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

ML4824 データシート(HTML) 1 Page - Fairchild Semiconductor

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www.fairchildsemi.com
REV. 1.0.6 11/7/03
Features
• Internally synchronized PFC and PWM in one IC
• Low total harmonic distortion
• Reduces ripple current in the storage capacitor between
the PFC and PWM sections
• Average current, continuous boost leading edge PFC
• Fast transconductance error amp for voltage loop
• High efficiency trailing edge PWM can be configured for
current mode or voltage mode operation
• Average line voltage compensation with brownout
control
• PFC overvoltage comparator eliminates output
“runaway” due to load removal
• Current fed gain modulator for improved noise immunity
• Overvoltage protection, UVLO, and soft start
General Description
The ML4824 is a controller for power factor corrected,
switched mode power supplies. Power Factor Correction
(PFC) allows the use of smaller, lower cost bulk capacitors,
reduces power line loading and stress on the switching FETs,
and results in a power supply that fully complies with
IEC1000-2-3 specification. The ML4824 includes circuits
for the implementation of a leading edge, average current,
“boost” type power factor correction and a trailing edge,
pulse width modulator (PWM).
The device is available in two versions; the ML4824-1 (fPWM
= fPFC) and the ML4824-2 (fPWM = 2 x fPFC). Doubling the
switching frequency of the PWM allows the user to design
with smaller output components while maintaining the best
operating frequency for the PFC. An over-voltage compara-
tor shuts down the PFC section in the event of a sudden
decrease in load. The PFC section also includes peak current
limiting and input voltage brown-out protection. The PWM
section can be operated in current or voltage mode at up to
250kHz and includes a duty cycle limit to prevent trans-
former saturation.
Block Diagram
15
VEAO
IEAO
VFB
IAC
VRMS
ISENSE
RAMP 1
OSCILLATOR
OVP
PFC ILIMIT
UVLO
VREF
PULSE WIDTH MODULATOR
POWER FACTOR CORRECTOR
2.5V
+
+
16
2
4
3
7.5V
REFERENCE
14
VCC
13
VCCZ
VEA
7
+
IEA
1
+
+
PFC OUT
12
S
R
Q
Q
S
R
Q
Q
2.7V
–1V
RAMP 2
8
PWM OUT
11
S
R
Q
Q
VDC
6
SS
5
DC ILIMIT
9
VCC
DUTY CYCLE
LIMIT
+
1V
+
2.5V
VFB
+
8V
8V
VIN OK
GAIN
MODULATOR
VCCZ
x 2
(-2 VERSION ONLY)
3.5k
3.5k
1.25V
50
µA
+
13.5V
DC ILIMIT
ML4824
Power Factor Correction and PWM Controller
Combo


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