STAC9708 datasheet(3/56 Pages) ETC

部品番号	STAC9708

部品情報	Multi-Channel AC97 Codec With Multi-Codec Option

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SigmaTel, Inc

Preliminary

STAC9708/11

3

10/02/98

Table of Contents

General Description

1

Ordering Information

2

1. PIN/SIGNAL Descriptions

9

1.1 Digital I/O

9

1.2 Analog I/O

10

1.3 Filter/References/GPIO

11

1.4 Power and Ground Signal

12

2. AC-Link

12

2.1 Clocking

13

2.2 Reset

13

3. Digital Interface

14

3.1 AC-Link Digital Serial Interface

Protocol

14

3.1.1 AC-Link Audio Output Frame

(SDATA_OUT)

15

3.1.1.1 Slot 1: Command Address Port

16

3.1.1.2 Slot 2: Command Data Port

17

3.1.1.3 Slot 3: PCM Playback Left

Channel

17

3.1.1.4 Slot 4: PCM Playback Right

Channel

17

3.1.1.5 Slot 5: Reserved

17

3.1.1.6 Slot 6: PCM Center Channel

17

3.1.1.7 Slot 7: PCM Left Surround

Channel

18

3.1.1.8 Slot 8: PCM Right Surround

Channel

18

3.1.1.9 Slot 9: PCM Low Frequency

Channel

18

3.1.1.10

Slot 10: PCM Alternate Left

18

3.1.1.11

Slot 11: PCM Alternate Right 18

3.1.1.12

Slot 12: Reserved

19

3.1.2 AC-Link Audio Input Frame

(SDATA_In)

19

3.1.2.1 Slot 1: Status Address Port

20

3.1.2.2 Slot 2: Status Data Port

21

3.1.2.3 Slot 3: PCM Record Left

Channel

21

3.1.2.4 Slot 4: PCM Record Right

Channel

21

3.1.2.5 Slots 5-12: Reserved

21

3.2 AC-Link Low Power Mode

21

3.2.1 Waking up the AC-Link

22

4. STAC9708/11 Mixer

23

4.1 Mixer Input.

25

4.2 Mixer Output

25

4.3 PC Beep Implementations

25

4.4 Programming Registers

26

4.4.1 Reset Register

27

4.4.2 Play Master Volume Registers

27

4.4.3 PC Beep Register

27

4.4.4 Analog Mixer Input Gain

28

4.4.5 Record Select Control

28

4.4.6 Record Gain Registers

30

4.4.7 General Purpose Register

30

4.4.8 3D Control Register

30

4.4.9 Multi-Channel Programming

31

4.4.10 Powerdown Control/Status

32

4.4.10.1 External Amplifier Power

Down (EAPD) Control

33

4.4.11 Extended Audio ID Register

33

4.4.12 Extended Audio Status Register

33

4.4.13 Analog Special Register

33

4.4.14 Vendor ID1 and ID2 Registers

33

5. Low Power Modes

34

6. Multiple Codec Support

36

6.1 Primary/Secondary Codec Selection

36

6.1.1 Primary Codec Operation

36

6.1.2 Secondary Codec Operation

36

6.2 Secondary Codec Register Access

Definitions

36

7. Testability

37

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