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AD588 データシート(PDF) 8 Page - Analog Devices |
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AD588 データシート(HTML) 8 Page - Analog Devices |
8 / 20 page AD588 Rev. L | Page 8 of 20 Figure 5 shows gain and balance trims in a +5 V and −5 V tracking configuration. A 100 kΩ, 20-turn potentiometer is used for each trim. The potentiometer for gain trim is connected between Pin 6 (VHIGH) and Pin 8 (VLOW) with the wiper connected to Pin 5 (GAIN ADJ). The potentiometer is adjusted to produce exactly 10 V between Pin 1 and Pin 15, the amplifier outputs. The balance potentiometer, also connected between Pin 6 and Pin 8 with the wiper to Pin 12 (BAL ADJ), is then adjusted to center the span from +5 V to −5 V. Trimming in other configurations works in exactly the same manner. When producing +10 V and +5 V, GAIN ADJ is used to trim +10 V and BAL ADJ is used to trim +5 V. In the −10 V and −5 V configuration, GAIN ADJ is again used to trim the magnitude of the span, −10 V, while BAL ADJ is used to trim the center tap, −5 V. Trimming the AD588 introduces no additional errors over temperature, so precision potentiometers are not required. For single-output voltage ranges, or in cases when balance adjust is not required, Pin 12 should be connected to Pin 11. If gain adjust is not required, Pin 5 should be left floating. In single output configurations, GAIN ADJ is used to trim outputs utilizing the full span (+10 V or −10 V), while BAL ADJ is used to trim outputs using half the span (+5 V or −5 V). Input impedance on both the GAIN ADJ and BAL ADJ pins is approximately 150 kΩ. The GAIN ADJ trim network effectively attenuates the 10 V across the trim potentiometer by a factor of about 1500 to provide a trim range of −3.5 mV to +7.5 mV with a resolution of approximately 550 μV/turn (20-turn potentiome- ter). The BAL ADJ trim network attenuates the trim voltage by a factor of about 1400, providing a trim range of ±4.5 mV with resolution of 450 μV/turn. R3 RB R1 R2 R4 R5 R6 –VS +VS A1 A4 AD588 A3 SYSTEM GROUND +10V +15V +5V –15V SYSTEM GROUND 0.1µF 0.1µF 1 14 15 2 16 13 11 12 8 10 9 5 3 4 6 7 A2 Figure 4. +10 V Output R3 RB R1 R2 R4 R5 R6 –VS +VS A1 A4 AD588 A3 A2 SYSTEM GROUND +5V +15V –5V –15V SYSTEM GROUND 0.1µF 0.1µF 100kΩ 20T BALANCE ADJUST 100kΩ 20T GAIN ADJUST +15V NOISE REDUCTION 1µF 39kΩ Figure 5. +5 V and −5 V Outputs R3 RB R1 R2 R4 R5 R6 –VS +VS A1 A4 AD588 A3 SYSTEM GROUND +15V –10V –15V SYSTEM GROUND 0.1µF 0.1µF NOISE REDUCTION –5V 0.1µF 0.1µF 1 14 15 2 16 3 4 6 7 13 11 12 8 10 9 5 A2 Figure 6. −10 V Output |
同様の部品番号 - AD588_15 |
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同様の説明 - AD588_15 |
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