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CA1524 データシート(PDF) 9 Page - Intersil Corporation

部品番号 CA1524
部品情報  Regulating Pulse Width Modulator
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メーカー  INTERSIL [Intersil Corporation]
ホームページ  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

CA1524 データシート(HTML) 9 Page - Intersil Corporation

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9
CA1524, CA2524, CA3524
Output Section
The CA1524 series outputs are two identical n-p-n
transistors with both collectors and emitters uncommitted.
Each output transistor has antisaturation circuitry that
enables a fast transient response for the wide range of
oscillator frequencies. Current limiting of the output section
is set at 100mA for each output and 100mA total if both
outputs are paralleled. Having both emitters and collectors
available provides the versatility to drive either n-p-n or p-n-p
external transistors. Curves of the output saturation voltage
as a function of temperature and output current are shown in
Figures 8 and 9, respectively. There are a number of output
configurations possible in the application of the CA1524 to
voltage regulator circuits which fall into three basic
classifications:
1. Capacitor-diode coupled voltage multipliers
2. Inductor-capacitor single-ended circuits
3. Transformer-coupled circuits
FIGURE 9. TYPICAL OUTPUT SATURATION VOLTAGE AS A
FUNCTION OF OUTPUT CURRENT
Device Application Suggestions
For higher currents, the circuit of Figure 10 may be used with
an external p-n-p transistor and bias resistor. The internal
regulator may be bypassed for operation from a fixed 5V
supply by connecting both terminals 15 and 16 to the input
voltage, which must not exceed 6V.
FIGURE 10. CIRCUIT FOR EXPANDING THE REFERENCE
CURRENT CAPABILITY
The internal 5V reference can be used for conventional regu-
lator applications if divided as shown in Figure 11. If the error
amplifier is connected as a unity gain amplifier, a fixed duty
cycle application results.
FIGURE 11. ERROR AMPLIFIER BIASING CIRCUITS
FIGURE 12. CIRCUIT TO ALLOW EXTERNAL BYPASS OF THE
REFERENCE REGULATION
To provide an expansion of the dead time without loading the
oscillator, the circuit of Figure 13 may be used.
FIGURE 13. CIRCUIT FOR EXPANSION OF DEAD TIME, WITH-
OUT USING A CAPACITOR ON PIN 3 OR WHEN A
LOW VALUE OSCILLATOR CAPACITOR IS USED
2.0
1.5
1.0
0.5
0
0
20
40
60
80
100
OUTPUT CURRENT, IL (mA)
TA = +25
oC
V+ = 8V to 40V
CA1524
REFERENCE
SECTION
15
16
8
V+
IL TO IA
DEPENDING
ON CHOICE
FOR Q1
GND
100
Q1
10
µF
+
-
VREF
VREF
2
1
R2
5K
5K
R1
-
+
-
+
2
1
R2
VREF
GND
GND
5K
5K
NEGATIVE
OUTPUT
VOLTAGES
POSITIVE
OUTPUT
VOLTAGES
VO
2.5V (R1 + R2)
R1
R1R2
R1 + R2
= 2.5KW
R1
CA1524
REFERENCE
SECTION
15
16
8
V+ CANNOT
EXCEED 6V
VT
VREF
NOTE: V+ Should Be in the 5V Range
And Must Not Exceed 6V
8
16
9
5K


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