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PD16732D データシート(PDF) 3 Page - Renesas Technology Corp

部品番号 PD16732D
部品情報  384-OUTPUT TFT-LCD SOURCE DRIVER (COMPATIBLE WITH 64-GRAY SCALES)
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メーカー  RENESAS [Renesas Technology Corp]
ホームページ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

PD16732D データシート(HTML) 3 Page - Renesas Technology Corp

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The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
©
2001,2002
MOS INTEGRATED CIRCUIT
µµµµPD16732D
384-OUTPUT TFT-LCD SOURCE DRIVER
(COMPATIBLE WITH 64-GRAY SCALES)
DATA SHEET
Document No. S15022EJ1V0DS00 (1st edition)
Date Published June 2002 NS CP (K)
Printed in Japan
DESCRIPTION
The
µPD16732D is a source driver for TFT-LCDs capable of dealing with displays with 64-gray scales. Data input is
based on digital input configured as 6 bits by 6 dots (2 pixels), which can realize a full-color display of 260,000 colors
by output of 64 values
γ -corrected by an internal D/A converter and 5-by-2 external power modules. Because the
output dynamic range is as large as VSS2 + 0.1 V to VDD2 – 0.1 V, level inversion operation of the LCD’s common
electrode is rendered unnecessary. Also, to be able to deal with dot-line inversion, n-line inversion and column line
inversion when mounted on a single side, this source driver is equipped with a built-in 6-bit D/A converter circuit
whose odd output pins and even output pins respectively output gray scale voltages of differing polarity. Assuring a
maximum clock frequency of 65 MHz when driving at 3.0 V, 45 MHz when driving at 2.3 V, this driver is applicable to
XGA-standard TFT-LCD panels and SXGA TFT-LCD panels.
FEATURES
• CMOS level input (2.3 to 3.6 V)
• 384 outputs
• Input of 6 bits (gray-scale data) by 6 dots
• Capable of outputting 64 values by means of 5-by-2 external power modules (10 units) and a D/A converter
• Logic power supply voltage (VDD1): 2.3 to 3.6 V
• Driver power supply voltage (VDD2): 8.0 to 9.0 V
• High-speed data transfer: fCLK = 65 MHz (internal data transfer speed when operating at VDD1 = 3.0 V)
• Output dynamic range: VSS2 + 0.1 V to VDD2 – 0.1 V
• Apply for dot-line inversion, n-line inversion and column line inversion
• Output voltage polarity inversion function (POL)
• Display data inversion function (capable of controlling by each input port) (POL21,POL22)
• Current consumption control function (LPC, Bcont)
• Succession of
µPD16732A driver
ORDERING INFORMATION
Part Number
Package
µPD16732DN-xxx
TCP (TAB package)
Remark
The TCP’s external shape is customized. To order the required shape, so please contact one of our
sales representatives.
The mark 5 shows major revised points.


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