データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

LF3304 データシート(PDF) 11 Page - LOGIC Devices Incorporated

部品番号 LF3304
部品情報  Dual Line Buffer/FIFO
Download  12 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  LODEV [LOGIC Devices Incorporated]
ホームページ  http://www.logicdevices.com
Logo LODEV - LOGIC Devices Incorporated

LF3304 データシート(HTML) 11 Page - LOGIC Devices Incorporated

Back Button LF3304 Datasheet HTML 4Page - LOGIC Devices Incorporated LF3304 Datasheet HTML 5Page - LOGIC Devices Incorporated LF3304 Datasheet HTML 6Page - LOGIC Devices Incorporated LF3304 Datasheet HTML 7Page - LOGIC Devices Incorporated LF3304 Datasheet HTML 8Page - LOGIC Devices Incorporated LF3304 Datasheet HTML 9Page - LOGIC Devices Incorporated LF3304 Datasheet HTML 10Page - LOGIC Devices Incorporated LF3304 Datasheet HTML 11Page - LOGIC Devices Incorporated LF3304 Datasheet HTML 12Page - LOGIC Devices Incorporated  
Zoom Inzoom in Zoom Outzoom out
 11 / 12 page
background image
DEVICES INCORPORATED
Video Imaging Products
11
LF3304
Dual Line Buffer/FIFO
08/16/2000–LDS.3304-F
1. Maximum Ratings indicate stress
specifications only. Functional oper-
ation of these products at values beyond
those indicated in the Operating Condi-
tions table is not implied. Exposure to
maximum rating conditions for ex-
tended periods may affect reliability.
2. The products described by this spec-
ification include internal circuitry de-
signedtoprotect the chipfromdamaging
substrate injection currents and accu-
mulations of static charge. Neverthe-
less, conventional precautions should
be observed during storage, handling,
and use of these circuits in order to avoid
exposure to excessive electrical stress
values.
3. This device provides hard clamping
of transient undershoot. Input levels
below ground will be clamped begin-
ning at –0.6 V. The device can withstand
indefinite operation with inputs or out-
puts in the range of –0.5 V to +5.5 V.
Device operation will not be adversely
affected, however, input current levels
will be well in excess of 100 mA.
4. Actual test conditions may vary from
those designated but operation is guar-
anteed as specified.
5. Supply current for a given applica-
tion can be accurately approximated
by:
where
N = total number of device outputs
C = capacitive load per output
V = supply voltage
F = clock frequency
6. Tested with outputs changing every
cycle and no load, at a 40 MHz clock rate.
7. Tested with all inputs within 0.1 V of
VCC
or Ground, no load.
8. These parameters are guaranteed but
not 100% tested.
9. AC specifications are tested with
NCV F
4
2
NOTES
input transition times less than 3 ns,
output reference levels of 1.5 V (except
tDIS
test), and input levels of nominally
0 to 3.0 V. Output loading may be a
resistive divider which provides for
specified IOH and IOL at an output
voltage of VOH min and VOL max
respectively.
Alternatively, a diode
bridge with upper and lower current
sources of IOH and IOL respectively,
and a balancing voltage of 1.5 V may be
used. Parasitic capacitance is 30 pF
minimum, and may be distributed.
This device has high-speed outputs ca-
pable of large instantaneous current
pulses and fast turn-on/turn-off times.
As a result, care must be exercised in the
testing of this device. The following
measures arerecommended:
a. A 0.1 µF ceramic capacitor should be
installed between VCC and Ground
leads as close to the Device Under Test
(DUT) as possible. Similar capacitors
should be installed between device VCC
and the tester common, and device
ground and tester common.
b. Ground and VCC supply planes must
be brought directly to the DUT socket or
contactor fingers.
c. Input voltages on a test fixture should
be adjusted to compensate for inductive
ground and VCC noise to maintain re-
quired DUT input levels relative to the
DUT ground pin.
10. Each parameter is shown as a mini-
mum or maximum value. Input require-
mentsarespecifiedfromthepointofview
of the external system driving the chip.
Setup time, for example, is specified as a
minimumsincetheexternalsystemmust
supplyatleastthatmuchtimetomeetthe
worst-case requirements of all parts.
Responses from the internal circuitry are
specified from the point of view of the
device. Output delay, for example, is
specified as a maximum since worst-
case operation of any device always pro-
vides data within that time.
11. For the tENA test, the transition is
measured to the 1.5 V crossing point with
datasheet loads. For the tDIS test, the
transition is measured to the ±200mV
level from the measured steady-state
output voltage with ±10mA loads.
The balancing voltage, VTH, is set at
3.0 V for Z-to-0 and 0-to-Z tests, and
set at 0 V for Z-to-1 and 1-to-Z tests.
12. These parameters are only tested at
the high temperature extreme, which is
the worst case for leakage current.
S1
IOH
IOL
VTH
CL
DUT
OE
0.2 V
tDIS
tENA
0.2 V
1.5 V
1.5 V
3.0V Vth
1
Z
0
Z
Z
1
Z
0
1.5 V
1.5 V
0V Vth
VOL*
VOH*
VOL*
VOH*
Measured VOL with IOH = –10mA and IOL = 10mA
Measured VOH with IOH = –10mA and IOL = 10mA
FIGURE B. THRESHOLD LEVELS
FIGURE A. OUTPUT LOADING CIRCUIT


同様の部品番号 - LF3304

メーカー部品番号データシート部品情報
logo
LOGIC Devices Incorpora...
LF3310 LODEV-LF3310 Datasheet
287Kb / 21P
   Horizontal / Vertical Digital Image Filter
LF3310QC12 LODEV-LF3310QC12 Datasheet
287Kb / 21P
   Horizontal / Vertical Digital Image Filter
LF3310QC15 LODEV-LF3310QC15 Datasheet
287Kb / 21P
   Horizontal / Vertical Digital Image Filter
LF3311 LODEV-LF3311 Datasheet
947Kb / 24P
   Horizontal / Vertical Digital Image Filter
LF3312 LODEV-LF3312 Datasheet
940Kb / 33P
   12-Mbit Frame Buffer / FIFO
More results

同様の説明 - LF3304

メーカー部品番号データシート部品情報
logo
List of Unclassifed Man...
WD1510 ETC1-WD1510 Datasheet
332Kb / 4P
   LIFO/FIFO Buffer Register
logo
LOGIC Devices Incorpora...
LF3312 LODEV-LF3312 Datasheet
940Kb / 33P
   12-Mbit Frame Buffer / FIFO
logo
Unisonic Technologies
U74AHC2G125 UTC-U74AHC2G125 Datasheet
219Kb / 6P
   DUAL BUFFER/LINE DRIVER; 3-STATE
logo
Nexperia B.V. All right...
74AHCT2G126 NEXPERIA-74AHCT2G126 Datasheet
230Kb / 13P
   Dual buffer/line driver; 3-state
Rev. 8 - 19 November 2018
logo
NXP Semiconductors
74AHC2G126 PHILIPS-74AHC2G126 Datasheet
103Kb / 20P
   Dual buffer/line driver; 3-state
Rev. 02-21 September 2004
74AHC_AHCT2G241 PHILIPS-74AHC_AHCT2G241_15 Datasheet
195Kb / 17P
   Dual buffer/line driver; 3-state
Rev. 3-13 May 2013
74AUP2G126 PHILIPS-74AUP2G126 Datasheet
102Kb / 19P
   Low-power dual buffer/line driver
Rev. 01-9 October 2006
74LVC2G241 NXP-74LVC2G241 Datasheet
98Kb / 17P
   Dual buffer/line driver; 3-state
Rev. 07-5 October 2007
74AHC2G241 NXP-74AHC2G241 Datasheet
105Kb / 16P
   Dual buffer/line driver; 3-state
Rev. 02-13 January 2009
74AHC2G126 NXP-74AHC2G126 Datasheet
100Kb / 15P
   Dual buffer/line driver; 3-state
Rev. 04-27 April 2009
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12


データシート ダウンロード

Go To PDF Page


リンク URL




プライバシーポリシー
ALLDATASHEET.JP
ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com