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9ZXL1251 データシート(PDF) 8 Page - Integrated Device Technology

部品番号 9ZXL1251
部品情報  Space-saving 64-pin VFQFPN package
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メーカー  IDT [Integrated Device Technology]
ホームページ  http://www.idt.com
Logo IDT - Integrated Device Technology

9ZXL1251 データシート(HTML) 8 Page - Integrated Device Technology

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DB1200ZL DERIVATIVE WITH INTEGRATED 85Ω TERMINATIONS
8
REVISION A 07/23/15
9ZXL1251 DATASHEET
Electrical Characteristics–DIF Low Power HCSL Outputs
Electrical Characteristics–Current Consumption
TAMB = TCOM or TIND, unless noted., Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS NOTES
TAMB = TCOM, Scope averaging on
1.6
3.3
4
V/ns
1,2,3
TAMB = TIND Scope averaging on
1.6
2.8
4.1
V/ns
1,2,3
Slew rate matching
ΔdV/dt
Slew rate matching, Scope averaging on
7
20
%
1,2,4
Voltage High
VHigh
660
754
850
Voltage Low
VLow
-150
62
150
Max Voltage
Vmax
868
1150
Min VoltageVmin
-300
-64
Crossing Voltage (abs)
Vcross_abs
Scope averaging off
250
453
550
mV
1,5
Crossing Voltage (var)
Δ-Vcross
Scope averaging off
17
140
mV
1,6
2 Measured from differential waveform
7 At default SMBus settings.
Slew rate
dV/dt
Statistical measurement on single-ended signal
using oscilloscope math function. (Scope
averaging on)
mV
Measurement on single ended signal using
absolute value. (Scope averaging off)
mV
1Guaranteed by design and characterization, not 100% tested in production.
3 Slew rate is measured through the Vswing voltage range centered around differential 0V. This results in a +/-150mV window around
differential 0V.
4 Matching applies to rising edge rate for Clock and falling edge rate for Clock#. It is measured using a +/-75mV window centered on
the average cross point where Clock rising meets Clock# falling. The median cross point is used to calculate the voltage thresholds the
oscilloscope is to use for the edge rate calculations.
5 Vcross is defined as voltage where Clock = Clock# measured on a component test board and only applies to the differential rising
edge (i.e. Clock rising and Clock# falling).
6 The total variation of all Vcross measurements in any particular system. Note that this is a subset of Vcross_min/max (Vcross
absolute) allowed. The intent is to limit Vcross induced modulation by setting
Δ-Vcross to be smaller than Vcross absolute.
TAMB = TCOM or TIND, unless noted., Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
NOTES
VDDA, PLL Mode@100MHz
13.4
20
mA
1
VDDA, PLL Bypass Mode@100MHz
4.8
8
mA
1
IDD
All other VDD pins
16
25
mA
IDDIO
VDDIO for DIF outputs, if applicable
81
95
mA
VDDA, PLL Mode@100MHz
3
5
mA
1
VDDA, PLL Bypass Mode@100MHz
3
5
mA
1
IDD
All other VDD pins
0.14
1
mA
IDDIO
VDDIO for DIF outputs, if applicable
0.01
0.3
mA
1. Includes VDDR if applicable
Operating Supply Current
IDDA
Power Down Current
IDDA


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