データシートサーチシステム |
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TPA2005D1-Q1 データシート(PDF) 4 Page - Texas Instruments |
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TPA2005D1-Q1 データシート(HTML) 4 Page - Texas Instruments |
4 / 29 page 8 SHUTDOWN NC IN+ IN− VO− GND VDD VO+ 8-PIN QFN (DRB) PACKAGE (TOP VIEW) 7 6 5 1 2 3 4 NC − No internal connection VO− GND VDD VO+ 8 7 6 5 1 2 3 4 SHUTDOWN NC IN+ IN− 8-PIN MSOP (DGN) PACKAGE (TOP VIEW) _ + _ + _ + _ + 150 k Ω 150 k Ω _ + _ + Deglitch Logic Deglitch Logic Gate Drive Gate Drive VDD Short Circuit Detect Startup & Thermal Protection Logic Ramp Generator Biases and References TTL Input Buffer SD Gain = 2 V/V B4, C4 VDD A4 VO− D4 VO+ † GND D1 IN− C1 IN+ A1 SHUTDOWN † A2, A3, B3, C2, C3, D2, D3 (terminal labels for MicroStar Junior package) TPA2005D1-Q1 SLOS474C – AUGUST 2005 – REVISED MARCH 2010 www.ti.com PIN ASSIGNMENTS A. The shaded terminals are used for electrical and thermal connections to the ground plane. All of the shaded terminals must be electrically connected to ground. No connect (NC) terminals still need a pad and trace. B. The thermal pad of the DRB and DGN packages must be electrically and thermally connected to a ground plane. Terminal Functions TERMINAL I/O DESCRIPTION NAME NO. IN– 4 I Negative differential input IN+ 3 I Positive differential input VDD 6 I Power supply VO+ 5 O Positive BTL output GND 7 I High-current ground VO– 8 O Negative BTL output SHUTDOWN 1 I Shutdown terminal (active low logic) NC 2 No internal connection Thermal Pad Must be soldered to a grounded pad on the PCB. FUNCTIONAL BLOCK DIAGRAM 4 Submit Documentation Feedback Copyright © 2005–2010, Texas Instruments Incorporated Product Folder Link(s): TPA2005D1-Q1 |
同様の部品番号 - TPA2005D1-Q1_15 |
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同様の説明 - TPA2005D1-Q1_15 |
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