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LM20145-Q1 データシート(PDF) 11 Page - Texas Instruments

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部品番号 LM20145-Q1
部品情報  5A PowerWise Adjustable Frequency Synchronous Buck Regulator
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メーカー  TI [Texas Instruments]
ホームページ  http://www.ti.com
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LM20145-Q1 データシート(HTML) 11 Page - Texas Instruments

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IBOUNDARY =
(VIN ± VOUT) x D
2 x L x fSW
LM20145
www.ti.com
SNVS530E – OCTOBER 2007 – REVISED MARCH 2013
PRE-BIAS START UP CAPABILITY
The LM20145 is in a pre-biased state when the device starts up with an output voltage greater than zero. This
often occurs in many multi-rail applications such as when powering an FPGA, ASIC, or DSP. In these
applications the output can be pre-biased through parasitic conduction paths from one supply rail to another.
Even though the LM20145 is a synchronous converter it will not pull the output low when a prebias condition
exists. During start up the LM20145 will not sink current until the Soft-Start voltage exceeds the voltage on the
FB pin. Since the device can not sink current it protects the load from damage that might otherwise occur if
current is conducted through the parasitic paths of the load.
POWER GOOD AND OVER VOLTAGE FAULT HANDLING
The LM20145 has built in under and over voltage comparators that control the power switches. Whenever there
is an excursion in output voltage above the set OVP threshold, the part will terminate the present on-pulse, turn-
on the low-side FET, and pull the PGOOD pin low. The low-side FET will remain on until either the FB voltage
falls back into regulation or the zero cross detection is triggered which in turn tri-states the FETs. If the output
reaches the UVP threshold the part will continue switching and the PGOOD pin will be asserted and go low.
Typical values for the PGOOD resistor are on the order of 100 k
Ω or less. To avoid false tripping during transient
glitches the PGOOD pin has 16 µs of built in deglitch time to both rising and falling edges.
UVLO
The LM20145 has a built-in under-voltage lockout protection circuit that keeps the device from switching until the
input voltage reaches 2.7V (typical). The UVLO threshold has 45 mV of hysteresis that keeps the device from
responding to power-on glitches during start up. If desired the turn-on point of the supply can be changed by
using the precision enable pin and a resistor divider network connected to VIN as shown in Figure 30. in the
design guide.
THERMAL PROTECTION
Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum
junction temperature is exceeded. When activated, typically at 160°C, the LM20145 tri-states the power FETs
and resets soft start. After the junction cools to approximately 150°C, the part starts up using the normal start up
routine. This feature is provided to prevent catastrophic failures from accidental device overheating.
LIGHT LOAD OPERATION
The LM20145 offers increased efficiency when operating at light loads. Whenever the load current is reduced to
a point where the peak to peak inductor ripple current is greater than two times the load current, the part will
enter the diode emulation mode preventing significant negative inductor current. The point at which this occurs is
the critical conduction boundary and can be calculated by the following equation:
(1)
Several diagrams are shown in Figure 25 illustrating continuous conduction mode (CCM), discontinuous
conduction mode, and the boundary condition.
It can be seen that in diode emulation mode, whenever the inductor current reaches zero the SW node will
become high impedance. Ringing will occur on this pin as a result of the LC tank circuit formed by the inductor
and the parasitic capacitance at the node. If this ringing is of concern an additional RC snubber circuit can be
added from the switch node to ground.
At very light loads, usually below 100 mA, several pulses may be skipped in between switching cycles, effectively
reducing the switching frequency and further improving light-load efficiency.
Copyright © 2007–2013, Texas Instruments Incorporated
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