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LM10010 データシート(PDF) 8 Page - Texas Instruments |
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LM10010 データシート(HTML) 8 Page - Texas Instruments |
8 / 17 page Slave Regulator FB VOUT LM10010 RFB1 RFB2 + - VOUT VFB + - + - IRFB2 IDAC_OUT IRFB1 VRFB1 + - IDAC_OUT VID LM10010 LM10010 SNVS717C – JULY 2011 – REVISED MARCH 2013 www.ti.com Theory of Operation The LM10010 can be thought of as a D/A converter, converting the VID communication to analog outputs. In this device, the output is a current DAC (IDAC_OUT), which is connected to the feedback node of a slave regulator. Therefore, all VID data words are decoded into a 6-bit current DAC output. The impedance of the feedback node at DC appears as the top feedback resistor. This is because the control loop of the slave regulator effectively maintains a constant current/voltage across the bottom feedback resistor, and creates low impedance at the VOUT node. Therefore, as more current is sourced into the feedback node, the more the output voltage is reduced. See Figure 14. Figure 14. Output voltage is controlled via current injection into the feedback node Current DAC The LM10010 current DAC is based on a low voltage bandgap reference setting a current through a precision adjustable resistor. This bandgap is trimmed for precision and gives excellent performance over temperature. The output current has a maximum full-scale range of 59.2 µA and is adjustable with the 6-bit VID word. This allows for 64 settings, with a resolution of 940 nA. The current DAC also has a slew limit to prevent abrupt changes in the output. As the VID data lines are set for the output voltage for the regulator, deglitch filters provide a small delay and the output current rises with a 1-e-t function that can be identified by a time constant. VID Programming Four pins are used to communicate with the LM10010. VIDC, VIDB, and VIDA are data lines, while VIDS is a latching strobe that programs in the LM10010 data. As shown in the Timing Diagram in Figure 2, the falling edge of VIDS latches in the data from VIDC, VIDB, and VIDA as the lower three LSB of the IDAC value. After a minimum hold time, the rising edge of VIDS latches in the data from VIDC, VIDB, and VIDA as the upper three LSB of the IDAC value. Internally, a delay on VIDS allows for the setting of all VID lines simultaneously. The VID data word is set so that the lowest output current is seen at the highest VID data word (59.2 µA at a code of 0d). Conversely, the lowest current is seen at the highest VID data word (0 µA at 63d). During VID operation with the regulator, this will translate to the lowest output voltage with the lowest VID word, and the highest output voltage with the highest VID word. The communications pins can be used with a low voltage microcontroller, with a maximum VIL of 0.4V and a minimum VIH of 1.1V. Upon startup, the IDAC is set at a code of 46d, which translates to approximately 16 µA. This default startup value is trimmed at final test. For applications with a different default output current at startup, please contact Texas Instruments. 8 Submit Documentation Feedback Copyright © 2011–2013, Texas Instruments Incorporated Product Folder Links: LM10010 |
同様の部品番号 - LM10010_15 |
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同様の説明 - LM10010_15 |
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