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LM10010 データシート(PDF) 9 Page - Texas Instruments |
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LM10010 データシート(HTML) 9 Page - Texas Instruments |
9 / 17 page LM10010 www.ti.com SNVS717C – JULY 2011 – REVISED MARCH 2013 Deglitch Time The four digital input pins all have deglitch filters which prevent transient noise from affecting the operation of the LM10010. These filters will also impart a small delay to the digital signal. On the VIDS latching signal, there is an additional delay. As mentioned previously, this allows for the VID data lines and the VIDS strobe to be set simultaneously without the need for setup time. Enable Pin and UVLO The enable (EN) pin allows the output of the device to be enabled or disabled with an external control signal. This pin is a precision analog input that enables the device when the voltage exceeds 1.34V (typical). The EN pin has 100 mV of hysteresis and will disable the output when the enable voltage falls below 1.24V (typical). If EN is not used, it can be left open, and will be pulled high by an internal 2 µA current source. Since the enable pin has a precise turn-on threshold it can be used along with an external resistor divider network from VIN to configure the device to turn-on at a precise input voltage. The LM10010 has a built-in under-voltage lockout (UVLO) protection circuit that keeps the device from operating until the input voltage reaches 2.65V (typical). The UVLO threshold has 200 mV of hysteresis that keeps the device from responding to power-on glitches during startup. Note that the enable and the UVLO are functionally the same as a reset. Bringing the device back from a low enable setting or from a VDD under-voltage event will reset the device back to its startup default setting. Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: LM10010 |
同様の部品番号 - LM10010_15 |
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同様の説明 - LM10010_15 |
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