CS1124

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6

APPLICATION INFORMATION

Referring to Figure 2, the following will be a design

example given these system requirements:

RRS + 1.5 kW (u 12 kW is considered open)

VRS(MAX) + 120 Vpk

VRS(MIN) + 250 mVpk

FVRS + 10 kHz @ VRS(MIN) + 40 Vpk−pk

1. Determine tradeoff between R1 value and power

rating. (use 1/2 watt package)

PD +

120

2

2

R1

t 1 2W

Set R1 = 15 k. (The clamp current will then be 120/15 k

= 8.0 mA, which is less than the 12 mA limit.)

VRS(+TRP) + 11mA

17 k

* 11mA(15 k ) 1.5 k) ) 160 m

VRS(+TRP) + 166 mV typical

(easily meets 250 mV minimum)

Examination of equation (7) and the spec reveals the worst

case trip voltage will occur when:

INP1 = 15

mA

R1 = 14.25 k (5% low)

VRS(+)MAX + 16 mA(17.85 k)

* 15mA(14.25 k ) 1.5 k) ) 180 mV

+ 229 mV

which is still less than the 250 mV minimum amplitude of

the input.

5. Calculate C1 for low pass filtering

pass filter using R1 and C1 can be used to eliminate high

frequency noise without affecting system performance.

Gain Reduction

+ 0.29 V

20 V

+ 0.0145 +*36.7 dB

used.

C1

v

1

2

pfCR1

v 0.07 mF

Set C1 = 0.047

mF.

an open circuit. (DIAG = 5.0 V)

Rearranging equation (7) gives

RRS +

VHYS ) [INP1

KI

RAdj]

* VRS(+TRP)

INP1

* R1

Using the following as worst case Low and High:

23.6

mA = 15 mA × 1.57

10.7

mA = 7.0 mA × 1.53

16.15 k

17.85 k

135 mV

185 mV

INP1

16

mA

6.0

mA

R1

15.75 k

14.25 k

1.57

1.53

RRS +

135 mV

) 23.6 mA

16.15 k

16

mA

* 15.75 k

+ 16.5 k

Therefore,

RRS(MIN) + 16.5 k (meets 12 k system spec)

and,

RRS(MAX) +

185 mV

) 10.7 mA

17.85 k

6.0

mA

* 14.25 k

+ 48.4 k