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74LVC126A データシート(PDF) 1 Page - ON Semiconductor |
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74LVC126A データシート(HTML) 1 Page - ON Semiconductor |
1 / 9 page © Semiconductor Components Industries, LLC, 2015 October, 2015 − Rev. 0 1 Publication Order Number: 74LVC126A/D 74LVC126A Low-Voltage CMOS Quad Buffer With 5 V−Tolerant Inputs and Outputs (3−State, Non−Inverting) The 74LVC126A is a high performance, non−inverting quad buffer operating from a 1.2 to 3.6 V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A VI specification of 5.5 V allows 74LVC126A inputs to be safely driven from 5.0 V devices. The 74LVC126A is suitable for memory address driving and all TTL level bus oriented transceiver applications. Current drive capability is 24 mA at the outputs. The Output Enable (OEn) inputs, when HIGH, disable the outputs by placing them in a HIGH Z condition. Features • Designed for 1.2 to 3.6 V VCC Operation • 5.0 V Tolerant − Interface Capability With 5.0 V TTL Logic • Supports Live Insertion and Withdrawal • IOFF Specification Guarantees High Impedance When VCC = 0 V • 24 mA Output Sink and Source Capability • Near Zero Static Supply Current in all Three Logic States (10 mA) Substantially Reduces System Power Requirements • ESD Performance: Human Body Model >2000 V Machine Model >200 V • These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant MARKING DIAGRAMS TSSOP−14 DT SUFFIX CASE 948G 14 1 SOIC−14 D SUFFIX CASE 751A 14 1 See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. ORDERING INFORMATION www.onsemi.com LVC126AG AWLYWW 1 14 LVC 126A ALYW G G 1 14 A = Assembly Location L, WL = Wafer Lot Y, YY = Year W, WW = Work Week G or G = Pb−Free Package (Note: Microdot may be in either location) |
同様の部品番号 - 74LVC126A |
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同様の説明 - 74LVC126A |
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