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MC145157DW2 データシート(PDF) 7 Page - Motorola, Inc

部品番号 MC145157DW2
部品情報  Parallel-Input PLL Frequency Synthesizer
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メーカー  MOTOROLA [Motorola, Inc]
ホームページ  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

MC145157DW2 データシート(HTML) 7 Page - Motorola, Inc

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MC145151–2 through MC145158–2
MOTOROLA
7
portion of the cycle). MC is then set back low, the counters
preset to their respective programmed values, and the above
sequence repeated. This provides for a total programmable
divide value (NT) = N P + A where P and P + 1 represent the
dual–modulus prescaler divide values respectively for high
and low MC levels, N the number programmed into the
÷ N
counter, and A the number programmed into the
÷ A counter.
LD
Lock Detector Output (Pin 28)
Essentially a high level when loop is locked (fR, fV of same
phase and frequency). Pulses low when loop is out of lock.
POWER SUPPLY
VDD
Positive Power Supply (Pin 3)
The positive power supply potential. This pin may range
from + 3 to + 9 V with respect to VSS.
VSS
Negative Power Supply (Pin 2)
The most negative supply potential. This pin is usually
ground.
TYPICAL APPLICATIONS
Figure 1. Synthesizer for Land Mobile Radio VHF Bands
NOTES:
1. Off–chip oscillator optional.
2. The
φR and φV outputs are fed to an external combiner/loop filter. See the Phase–Locked Loop — Low–Pass Filter
Design page for additional information. The
φR and φV outputs swing rail–to–rail. Therefore, the user should be careful
not to exceed the common mode input range of the op amp used in the combiner/loop filter.
LOCK DETECT SIGNAL
10.24 MHz
NOTE 1
R1
MC33171
NOTE 2
+
150 – 175 MHz
5 kHz STEPS
MC12017
÷ 64/65 PRESCALER
MC145152–2
MC
LD
A0
A5
N9
OSCin
VDD
VSS
OSCout
RA2
RA1
φR
φV
fin
VCO
RA0
N0
+ V
R1
R2
C
R2
C
“1”
“1”
“1”
NO CONNECTS
CHANNEL PROGRAMMING


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