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LM10 データシート(PDF) 5 Page - Texas Instruments |
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LM10 データシート(HTML) 5 Page - Texas Instruments |
5 / 37 page LM10 www.ti.com SNOSBH4E – MAY 1998 – REVISED OCTOBER 2015 6.4 Electrical Characteristics LM10/LM10B TJ=25°C unless otherwise specified (1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TJ=25°C 0.3 2 mV Input offset voltage TMIN ≤ TJ ≤ TMAX (see (1)) 3 mV TJ=25°C 0.25 0.7 nA Input offset current(2) TMIN ≤ TJ ≤ TMAX (see (1)) 1.5 nA TJ=25°C 10 20 nA Input bias current TMIN ≤ TJ ≤ TMAX (see (1)) 30 nA TJ=25°C 250 500 k Ω Input resistance TMIN ≤ TJ ≤ TMAX (see (1)) 150 k Ω VS = ±20 V, IOUT = 0 120 400 V/mV VOUT = ±19.95 V, TMIN ≤ TJ ≤ TMAX (see (1)) 80 V/mV VS = ±20 V, VOUT = ±19.4 V 50 130 V/mV IOUT = ±20 mA, TMIN ≤ TJ ≤ TMAX (see (1)) 20 V/mV Large signal voltage IOUT = ±15 mA, TMIN ≤ TJ ≤ TMAX (see (1)) 20 V/mV gain VS = ±0.6 V, IOUT = ±2 mA 1.5 3 V/mV VS = ±0.65 V, IOUT = ±2 mA, TMIN ≤ TJ ≤ TMAX (see (1)) 1.5 3 V/mV VOUT = ±0.4 V, TMIN ≤ TJ ≤ TMAX (see (1)) 0.5 V/mV VOUT = ±0.3 V, VCM = −0.4 V, TMIN ≤ TJ ≤ TMAX (see (1)) 0.5 V/mV 1.2 V ≤ VOUT ≤ 40 V, RL = 1.1 kΩ 14 33 V/mV 1.3 V ≤ VOUT ≤ 40 V, RL = 1.1 kΩ, TMIN ≤ TJ ≤ TMAX (see (1)) 14 33 V/mV Shunt gain(3) 0.1 mA ≤ IOUT ≤ 5 mA, TMIN ≤ TJ ≤ TMAX (see (1)) 6 V/mV 1.5 V ≤ V+ ≤ 40 V, RL = 250 Ω 8 25 V/mV 0.1 mA ≤ IOUT ≤ 20 mA, TMIN ≤ TJ ≤ TMAX (see (1)) 4 V/mV −20 V ≤ VCM ≤ 19.15 V 93 102 dB Common-mode −20 V ≤ VCM ≤ 19 V, TMIN ≤ TJ ≤ TMAX (see (1)) 93 102 dB rejection VS = ±20 V, TMIN ≤ TJ ≤ TMAX (see (1)) 87 dB −0.2 V ≥ V− ≥ −39 V 90 96 dB V+ = 1 V, TMIN ≤ TJ ≤ TMAX (see (1)) 84 dB V+ = 1.1 V, TMIN ≤ TJ ≤ TMAX (see (1)) 84 dB Supply-voltage rejection 1 V ≤ V+ ≤ 39.8 V 96 106 dB 1.1 V ≤ V+ ≤ 39.8 V, TMIN ≤ TJ ≤ TMAX (see (1)) 96 106 dB V− = −0.2 V, TMIN ≤ TJ ≤ TMAX (see (1)) 90 dB Offset voltage drift 2 μV/°C Offset current drift 2 pA/°C Bias current drift TC < 100°C 60 pA/°C 1.2 V ≤ VS ≤ 40 V 0.001 0.003 %/V Line regulation 1.3 V ≤ VS ≤ 40 V, TMIN ≤ TJ ≤ TMAX (see (1)) 0.001 0.003 %/V 0 ≤ IREF ≤ 1 mA, VREF = 200 mV, TMIN ≤ TJ ≤ TMAX (see (1)) 0.006 %/V 0 ≤ IREF ≤ 1 mA 0.01% 0.1% Load regulation V+ − VREF ≥ 1 V, TMIN ≤ TJ ≤ TMAX (see (1)) 0.15% V+ − VREF ≥ 1.1 V, TMIN ≤ TJ ≤ TMAX (see (1)) 0.15% (1) These specifications apply for V− ≤ VCM ≤ V +− 0.85 V, 1 V (T MIN ≤ TJ ≤ TMAX), 1.2 V, 1.3 V (TMIN ≤ TJ ≤ TMAX) < VS ≤ VMAX, VREF = 0.2 V and 0 ≤ IREF ≤ 1 mA, unless otherwise specified: VMAX = 40 V for the standard part and 6.5 V for the low voltage part. The full- temperature-range operation is −55°C to 125°C for the LM10, −25°C to 85°C for the LM10B(L) and 0°C to 70°C for the LM10C(L). The specifications do not include the effects of thermal gradients ( τ1 ≃ 20 ms), die heating (τ2 ≃ 0.2 s) or package heating. Gradient effects are small and tend to offset the electrical error (see curves). (2) For TJ > 90°C, IOS may exceed 1.5 nA for VCM = V −. With T J = 125°C and V − ≤ V CM ≤ V − + 0.1 V, I OS ≤ 5 nA. (3) This defines operation in floating applications such as the bootstrapped regulator or two-wire transmitter. Output is connected to the V+ terminal of the IC and input common mode is referred to V− (see System Examples). Effect of larger output-voltage swings with higher load resistance can be accounted for by adding the positive-supply rejection error. Copyright © 1998–2015, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: LM10 |
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