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データシートサーチシステム |
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データシートサーチシステム |
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PEB2055 データシート(PDF) 46 Page - Infineon Technologies AG |
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PEB2055 データシート(HTML) 46 Page - Infineon Technologies AG |
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46 / 269 page  PEB 2055 PEF 2055 Detailed Register Description Semiconductor Group 46 4 Detailed Register Description 4.1 Register Address Arrangement Group Reg. Name Access Address mux AD7..0 Address demux OMDR:RBS/ A3..0 Reset Value Comment Refer to page PCM interface PMOD RD/WR 20H 1/0H 00H PCM-mode reg. 48 PBNR RD/WR 22H 1/1H FFH PCM-bit number reg. 50 POFD RD/WR 24H 1/2H 00H PCM-offset downstream reg. 50 POFU RD/WR 26H 1/3H 00H PCM-offset upstream reg. 51 PCSR RD/WR 28H 1/4H 00H PCM-clock shift reg. 51 PICM RD 2AH 1/5H xxH PCM-input comparison mismatch reg. 52 CFI interface CMD1 RD/WR 2CH 1/6H 00H CFI-mode reg. 1 53 CMD2 RD/WR 2EH 1/7H 00H CFI-mode reg. 2 55 CBNR RD/WR 30H 1/8H FFH CFI-bit number reg. 58 CTAR RD/WR 32H 1/9H 00H CFI time slot adjustment reg. 58 CBSR RD/WR 34H 1/AH 00H CFI-bit shift reg. 59 CSCR RD/WR 36H 1/BH 00H CFI-subchannel reg. 60 Memory access MACR RD/WR 00H 0/0H xxH Memory access control reg. 61 MAAR RD/WR 02H 0/1H xxH Memory access address reg. 65 MADR RD/WR 04H 0/2H xxH Memory access data reg. 66 Synchro- nous transfer STDA RD/WR 06H 0/3H xxH Synchron transfer data reg. A 67 STDB RD/WR 08H 0/4H xxH Synchron transfer data reg. B 67 SARA RD/WR 0AH 0/5H xxH Synchron transfer receive address reg. A 68 SARB RD/WR 0CH 0/6H xxH Synchron transfer receive address reg. B 69 SAXA RD/WR 0EH 0/7H xxH Synchron transfer transmit address reg. A 69 SAXB RD/WR 10H 0/8H xxH Synchron transfer transmit address reg. B 70 STCR RD/WR 12H 0/9H 00xxxx xx Synchron transfer control reg. 70 |
同様の部品番号 - PEB2055 |
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同様の説明 - PEB2055 |
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