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GS2971-IBE3 データシート(PDF) 5 Page - Semtech Corporation

部品番号 GS2971-IBE3
部品情報  3Gb/s, HD, SD SDI Receiver, with Integrated Adaptive Cable Equalizer complete with SMPTE Audio and Video Processing
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メーカー  SEMTECH [Semtech Corporation]
ホームページ  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

GS2971-IBE3 データシート(HTML) 5 Page - Semtech Corporation

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GS2971 3Gb/s, HD, SD SDI Receiver
Data Sheet
45898 - 2
September 2012
5 of 148
4.12.1 CEA-861 Timing Generation ....................................................................................... 51
4.13 Automatic Video Standards Detection ................................................................................ 59
4.14 Data Format Detection & Indication ..................................................................................... 62
4.15 EDH Detection .............................................................................................................................. 63
4.15.1 EDH Packet Detection ................................................................................................... 63
4.15.2 EDH Flag Detection ........................................................................................................ 63
4.16 Video Signal Error Detection & Indication ......................................................................... 64
4.16.1 TRS Error Detection........................................................................................................ 65
4.16.2 Line Based CRC Error Detection ................................................................................ 66
4.16.3 EDH CRC Error Detection............................................................................................. 66
4.16.4 HD & 3G Line Number Error Detection ................................................................... 66
4.17 Ancillary Data Detection & Indication ................................................................................. 67
4.17.1 Programmable Ancillary Data Detection................................................................ 68
4.17.2 SMPTE 352M Payload Identifier ................................................................................ 69
4.17.3 Ancillary Data Checksum Error ................................................................................. 70
4.17.4 Video Standard Error.....................................................................................................71
4.18 Signal Processing ......................................................................................................................... 72
4.18.1 TRS Correction & Insertion........................................................................................... 73
4.18.2 Line Based CRC Correction & Insertion ................................................................... 73
4.18.3 Line Number Error Correction & Insertion ............................................................. 73
4.18.4 ANC Data Checksum Error Correction & Insertion ............................................. 73
4.18.5 EDH CRC Correction & Insertion ............................................................................... 73
4.18.6 Illegal Word Re-mapping ............................................................................................. 74
4.18.7 TRS and Ancillary Data Preamble Remapping...................................................... 74
4.18.8 Ancillary Data Extraction............................................................................................. 74
4.18.9 Level B to Level A Conversion .................................................................................... 78
4.19 Audio De-embedder ................................................................................................................... 79
4.19.1 Serial Audio Data I/O Signals...................................................................................... 79
4.19.2 Serial Audio Data Format Support ............................................................................ 81
4.19.3 Audio Processing............................................................................................................. 85
4.19.4 Error Reporting ................................................................................................................ 91
4.20 GSPI - HOST Interface ................................................................................................................ 92
4.20.1 Command Word Description...................................................................................... 92
4.20.2 Data Read or Write Access........................................................................................... 93
4.20.3 GSPI Timing....................................................................................................................... 94
4.21 Host Interface Register Maps .................................................................................................. 96
4.21.1 Video Core Registers...................................................................................................... 96
4.21.2 SD Audio Core Registers.............................................................................................109
4.21.3 HD and 3G Audio Core Registers.............................................................................124
4.22 JTAG Test Operation ................................................................................................................139
4.23 Device Power-up .......................................................................................................................141
4.24 Device Reset ................................................................................................................................141
4.25 Standby Mode ............................................................................................................................141
5. Application Reference Design .............................................................................................................142
5.1 High Gain Adaptive Cable Equalizers ..................................................................................142
5.2 PCB Layout .....................................................................................................................................142
5.3 Typical Application Circuit ......................................................................................................143


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