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GS2961 データシート(PDF) 4 Page - Gennum Corporation |
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GS2961 データシート(HTML) 4 Page - Gennum Corporation |
4 / 104 page GS2961 3Gb/s, HD, SD SDI Receiver, with Integrated Adaptive Cable Equalizer Data Sheet 48004 - 2 November 2009 4 of 104 Contents Key Features........................................................................................................................................................1 Errata......................................................................................................................................................................1 Applications.........................................................................................................................................................1 Description...........................................................................................................................................................1 Functional Block Diagram ..............................................................................................................................2 Revision History .................................................................................................................................................3 1. Pin Out...............................................................................................................................................................8 1.1 Pin Assignment ..................................................................................................................................8 1.2 Pin Descriptions ................................................................................................................................8 2. Electrical Characteristics ......................................................................................................................... 15 2.1 Absolute Maximum Ratings ....................................................................................................... 15 2.2 Recommended Operating Conditions .................................................................................... 15 2.3 DC Electrical Characteristics ..................................................................................................... 16 2.4 AC Electrical Characteristics ..................................................................................................... 18 3. Input/Output Circuits ............................................................................................................................... 23 4. Detailed Description.................................................................................................................................. 27 4.1 Functional Overview .................................................................................................................... 27 4.2 SMPTE 425M Mapping - 3G Level A and Level B Formats ............................................... 28 4.2.1 Level A Mapping................................................................................................................ 28 4.2.2 Level B Mapping ................................................................................................................ 28 4.3 Serial Digital Input ........................................................................................................................ 29 4.3.1 Integrated Adaptive Cable Equalizer.......................................................................... 29 4.4 Serial Digital Loop-Through Output ........................................................................................ 30 4.5 Serial Digital Reclocker ............................................................................................................... 30 4.5.1 PLL Loop Bandwidth ........................................................................................................31 4.6 External Crystal/Reference Clock ...........................................................................................32 4.7 Lock Detect ...................................................................................................................................... 33 4.7.1 Asynchronous Lock .......................................................................................................... 33 4.7.2 Signal Interruption............................................................................................................ 34 4.8 SMPTE Functionality .................................................................................................................... 34 4.8.1 Descrambling and Word Alignment ........................................................................... 34 4.9 Parallel Data Outputs ................................................................................................................... 35 4.9.1 Parallel Data Bus Buffers.................................................................................................35 4.9.2 Parallel Output in SMPTE Mode ................................................................................... 38 4.9.3 Parallel Output in DVB-ASI Mode ............................................................................... 38 4.9.4 Parallel Output in Data-Through Mode ..................................................................... 39 4.9.5 Parallel Output Clock (PCLK)......................................................................................... 39 4.9.6 DDR Parallel Clock Timing ............................................................................................. 40 4.10 Timing Signal Generator ........................................................................................................... 41 4.10.1 Manual Switch Line Lock Handling.......................................................................... 42 4.10.2 Automatic Switch Line Lock Handling .................................................................... 43 4.10.3 Switch Line Lock Handling During Level B to Level A Conversion ............... 44 |
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同様の説明 - GS2961 |
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