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54F64LM データシート(PDF) 1 Page - National Semiconductor (TI) |
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54F64LM データシート(HTML) 1 Page - National Semiconductor (TI) |
1 / 6 page TLF9467 November 1994 54F74F64 4-2-3-2-Input AND-OR-Invert Gate General Description This device contains gates configured to perform a 4-2-3-2 input AND-OR-INVERT function Commercial Military Package Package Description Number 74F64PC N14A 14-Lead (0300 Wide) Molded Dual-In-Line 54F64DM (Note 2) J14A 14-Lead Ceramic Dual-In-Line 74F64SC (Note 1) M14A 14-Lead (0150 Wide) Molded Small Outline JEDEC 54F64FM (Note 2) W14B 14-Lead Cerpack 54F64LM (Note 2) E20A 20-Lead Ceramic Leadless Chip Carrier Type C Note 1 Devices also available in 13 reel Use suffix e SCX Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB Logic Symbol IEEEIEC TLF9467 – 3 Connection Diagrams Pin Assignment for DIP SOIC and Flatpak TLF9467 – 2 Pin Assignment for LCC TLF9467 – 1 Unit LoadingFan Out 54F74F Pin Names Description UL Input IIH IIL HIGHLOW Output IOH IOL An Bn Cn Dn Inputs 1010 20 mA b06 mA O Output 50333 b 1 mA20 mA TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation RRD-B30M105Printed in U S A |
同様の部品番号 - 54F64LM |
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同様の説明 - 54F64LM |
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