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54F652FM データシート(PDF) 4 Page - National Semiconductor (TI) |
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54F652FM データシート(HTML) 4 Page - National Semiconductor (TI) |
4 / 10 page Functional Description In the transceiver mode data present at the HIGH imped- ance port may be stored in either the A or B register or both The select (SAB SBA) controls can multiplex stored and real-time The examples in Figure 1 demonstrate the four fundamental bus-management functions that can be performed with the Octal bus transceivers and receivers Data on the A or B data bus or both can be stored in the internal D flip-flop by LOW to HIGH transitions at the appro- priate Clock Inputs (CPAB CPBA) regardless of the Select or Output Enable Inputs When SAB and SBA are in the real time transfer mode it is also possible to store data without using the internal D flip-flops by simultaneously enabling OEAB and OEBA In this configuration each Output reinforc- es its Input Thus when all other data sources to the two sets of bus lines are in a HIGH impedance state each set of bus lines will remain at its last state Note A Real-Time Transfer Bus B to Bus A TLF9581 – 6 OEAB OEBA CPAB CPBA SAB SBA LL X X X L Note B Real-Time Transfer Bus A to Bus B TLF9581 – 7 OEAB OEBA CPAB CPBA SAB SBA HHX X L X Note C Storage TLF9581 – 8 OEAB OEBA CPAB CPBA SAB SBA XH L XX X LX X L XX LH LL XX Note D Transfer Storage Data to A or B TLF9581 – 9 OEAB OEBA CPAB CPBA SAB SBA H L HorL HorL H X FIGURE 1 Inputs InputsOutputs (Note 1) Operating Mode OEAB OEBA CPAB CPBA SAB SBA A0 thru A7 B0 thru B7 L H HorL HorL X X Input Input Isolation LH LL X X Store A and B Data XH L H or L X X Input Not Specified Store A Hold B HH LL X X Input Output Store A in Both Registers L X HorL L X X Not Specified Input Hold A Store B LL LL X X Output Input Store B in Both Registers LL X X X L Output Input Real-Time B Data to A Bus L L X H or L X H Store B Data to A Bus HHX X L X Input Output Real-Time A Data to B Bus H H H or L X H X Stored A Data to B Bus H L H or L H or L H H Output Output Stored A Data to B Bus and Stored B Data to A Bus H e HIGH Voltage Level L e LOW Voltage Level X e Immaterial L e LOW to HIGH Clock Transition Note 1 The data output functions may be enabled or disabled by various signals at OEAB or OEBA inputs Data input functions are always enabled ie data at the bus pins will be stored on every LOW to HIGH transition on the clock inputs 4 |
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同様の説明 - 54F652FM |
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