データシートサーチシステム |
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CD4512BC データシート(PDF) 3 Page - National Semiconductor (TI) |
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CD4512BC データシート(HTML) 3 Page - National Semiconductor (TI) |
3 / 6 page DC Electrical Characteristics CD4512BC (Note 2) (Continued) Symbol Parameter Conditions b 40 C a 25 C a 85 C Units Min Max Min Typ Max Min Max VIH High Level VDD e 5V VO e 45V 35 35 275 35 V Input Voltage VDD e 10V VO e 90V 70 70 550 70 V VDD e 15V VO e 135V 110 110 825 110 V IOL Low Level Output VDD e 5V VO e 04V 052 044 078 036 mA Current VDD e 10V VO e 05V 13 11 20 09 mA (Note 3) VDD e 15V VO e 15V 36 34 78 24 mA IOH High Level Output VDD e 5V VO e 46V b 02 b 016 b 012 mA Current VDD e 10V VO e 95 b 05 b 04 b 03 mA (Note 3) VDD e 15V VO e 135V b 14 b 12 b 10 mA IIN Input Current VDD e 15V VIN e 0V b 03 b 10b5 b 03 b 10 m A VDD e 15V VIN e 15V 03 10b5 03 10 m A IOZ TRI-STATE VDD e 15V VO e 0V g 10 g 10b5 g 10 g 75 m A Output Current VDD e 15V VO e 15V AC Electrical Characteristics TA e 25 C tr e tf e 20 ns CL e 50 pF Symbol Parameter Conditions CD4512BM CD4512BC Units Min Typ Max Min Typ Max tPHL Propagation Delay VDD e 5V 225 500 225 750 ns High-to-Low Level VDD e 10V 75 175 75 200 ns VDD e 15V 57 130 57 150 ns tPLH Propagation Delay VDD e 5V 225 500 225 750 ns Low-to-High Level VDD e 10V 75 175 75 200 ns VDD e 15V 57 130 57 150 ns tTHL tTLH Transition Time VDD e 5V 70 200 70 200 ns VDD e 10V 35 100 35 100 ns VDD e 15V 25 80 25 80 ns tPHZ tPLZ Propagation Delay into VDD e 5V 50 125 50 125 ns TRI-STATE from Logic Level VDD e 10V 25 75 25 75 ns VDD e 15V 19 60 19 60 ns tPZH tPZL Propagation Delay to Logic VDD e 5V 50 125 50 125 ns Level from TRI-STATE VDD e 10V 25 75 25 75 ns VDD e 15V 19 60 19 60 ns CIN Input Capacitance (Note 4) 75 15 75 15 pF COUT TRI-STATE Output (Note 4) 75 15 75 15 pF Capacitance CPD Power Dissipation Capacity (Note 5) 150 150 pF AC Parameters are guaranteed by DC correlated testing Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed They are not meant to imply that the devices should be operated at these limits The tables of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provide conditions for actual device operation Note 2 VSS e 0V unless otherwise specified Note 3 IOH and IOL are tested one output at a time Note 4 Capacitance guaranteed by periodic testing Note 5 CPD determines the no load AC power of any CMOS device For complete explanation see 54C74C Family Characteristics Application Note AN-90 3 |
同様の部品番号 - CD4512BC |
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同様の説明 - CD4512BC |
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