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ADM1270ACPZ-R2 データシート(PDF) 7 Page - Analog Devices

部品番号 ADM1270ACPZ-R2
部品情報  High Voltage Input Protection Device
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ADM1270ACPZ-R2 データシート(HTML) 7 Page - Analog Devices

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Data Sheet
ADM1270
Rev. A | Page 7 of 21
Pin No.
Mnemonic
Description
15
VCC/SENSE+
Positive Supply Input Pin (VCC). A UVLO circuit resets the device when a low supply voltage is detected. GATE is
held off when the supply is below UVLO. No sequencing is required.
Positive Current Sense Input Pin (SENSE+). This pin connects to the main supply input. A sense resistor between
the VCC/SENSE+ pin and the SENSE− pin sets the analog current limit. The hot swap operation of the ADM1270
controls the external FET gate to maintain the sense voltage (VSENSE+ − VSENSE−).
16
RPFG
Reverse Protection FET Gate Driver Output. Connect this pin to the gate of the external reverse polarity protection
P-channel FET for low voltage drop operation.
N/A1
EP
Exposed Pad. The exposed pad is located on the underside of the LFCSP package. Solder the exposed pad to the
printed circuit board (PCB) to improve thermal dissipation. The exposed pad can be connected to ground.
1
N/A = not applicable.


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