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LM10000 データシート(PDF) 2 Page - Texas Instruments |
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LM10000 データシート(HTML) 2 Page - Texas Instruments |
2 / 22 page LM10000 SNVS643C – JUNE 2010 – REVISED APRIL 2013 www.ti.com CONNECTION DIAGRAM Figure 1. 14-Lead Plastic WSON PIN DESCRIPTIONS Pin No. Pad Name Type Pad Description 1 FLT_N Input External fault input. Usually connected to PWGD output of integrated regulator. 2 AGND GND 3 VDD Power Analog Bias power input. 4 AGND GND 5 ADDR Input PWI address selection 6 EN_BIAS Input Enable input. 7 CONTROL Input VOUT control input from system. Logic level. 8 IAVS Output Current DAC output that connects to feedback node of integrated regulator 9 IAVS_MIRROR Output Current DAC output that mirrors IAVS output current 10 RESET_N Input Reset, active low. 11 CNTL_EN Output Enable signal that connects to integrated regulator 12 VPWI Power PWI IO bias power 13 SPWI I/O PWI Data 14 SCLK Input PWI Clock 2 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: LM10000 |
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同様の説明 - LM10000 |
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