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SN74ACT3638-30PQ データシート(PDF) 1 Page - Texas Instruments |
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SN74ACT3638-30PQ データシート(HTML) 1 Page - Texas Instruments |
1 / 33 page SN74ACT3638 512 × 32 × 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SCAS228D – JUNE 1992 – REVISED APRIL 1998 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident D Two Independent 512 × 32 Clocked FIFOs Buffering Data in Opposite Directions D Read Retransmit Capability From FIFO on Port B D Mailbox-Bypass Register for Each FIFO D Programmable Almost-Full and Almost-Empty Flags D Microprocessor Interface Control Logic D IRA, ORA, AEA, and AFA Flags Synchronized by CLKA D IRB, ORB, AEB, and AFB Flags Synchronized by CLKB D Low-Power 0.8-µm Advanced CMOS Technology D Supports Clock Frequencies up to 67 MHz D Fast Access Times of 11 ns D Package Options Include 120-Pin Thin Quad Flat (PCB) and 132-Pin Quad Flat (PQ) Packages PCB PACKAGE (TOP VIEW) CSA W/RA ENA CLKA VCC A31 A30 GND A29 A28 A27 A26 A25 A24 A23 GND A22 VCC A21 A20 A19 A18 GND A17 A16 A15 A14 A13 VCC A12 CSB W/RB ENB CLKB GND B31 B30 B29 B28 B27 B26 VCC B25 B24 GND B23 B22 B21 B20 B19 B18 GND B17 B16 VCC B15 B14 B13 B12 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 NC – No internal connection Copyright © 1998, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. |
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