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MC100EP105FA データシート(PDF) 6 Page - ON Semiconductor |
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MC100EP105FA データシート(HTML) 6 Page - ON Semiconductor |
6 / 8 page MC10EP105, MC100EP105 http://onsemi.com 6 Driver Device Receiver Device D D Q Q 50 Ω 50 Ω VTT Figure 4. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020 – Termination of ECL Logic Devices.) VTT = VCC – 2.0 V Resource Reference of Application Notes AN1404 – ECLinPS Circuit Performance at Non–Standard VIH Levels AN1405 – ECL Clock Distribution Techniques AN1406 – Designing with PECL (ECL at +5.0 V) AN1504 – Metastability and the ECLinPS Family AN1568 – Interfacing Between LVDS and ECL AN1650 – Using Wire–OR Ties in ECLinPS Designs AN1672 – The ECL Translator Guide AND8001 – Odd Number Counters Design AND8002 – Marking and Date Codes AND8009 – ECLinPS Plus Spice I/O Model Kit AND8020 – Termination of ECL Logic Devices For an updated list of Application Notes, please see our website at http://onsemi.com. |
同様の部品番号 - MC100EP105FA |
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同様の説明 - MC100EP105FA |
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