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TSB43AB22 データシート(PDF) 20 Page - Texas Instruments |
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TSB43AB22 データシート(HTML) 20 Page - Texas Instruments |
20 / 112 page 2–8 Table 2–8. Power Supply Terminals TERMINAL TYPE I/O DESCRIPTION NAME NO. TYPE I/O DESCRIPTION AGND 109–111, 117, 126–128 Supply – Analog circuit ground terminals. These terminals must be tied together to the low-impedance circuit board ground plane. AVDD 1, 2, 107, 108, 120 Supply – Analog circuit power terminals. A parallel combination of high frequency decoupling capacitors near each terminal is suggested, such as 0.1 µF and 0.001 µF. Lower frequency 10-µF filtering capacitors are also recommended. These supply terminals are separated from PLLVDD and DVDD internal to the device to provide noise isolation. They must be tied at a low-impedance point on the circuit board. DGND 17, 23, 33, 44, 55, 64, 68, 75, 83, 103 Supply – Digital circuit ground terminals. These terminals must be tied together to the low-impedance circuit board ground plane. DVDD 15, 27, 39, 51, 59, 72, 88, 100 Supply – Digital circuit power terminals. A parallel combination of high frequency decoupling capacitors near each DVDD terminal is suggested, such as 0.1 µF and 0.001 µF. Lower frequency 10-µF filtering capacitors are also recommended. These supply terminals are separated from PLLVDD and AVDD internal to the device to provide noise isolation. They must be tied at a low-impedance point on the circuit board. PLLGND 8 Supply – PLL circuit ground terminal. This terminal must be tied to the low-impedance circuit board ground plane. PLLVDD 7 Supply – PLL circuit power terminal. A parallel combination of high frequency decoupling capacitors near the terminal is suggested, such as 0.1 µF and 0.001 µF. Lower frequency 10-µF filtering capacitors are also recommended. This supply terminal is separated from DVDD and AVDD internal to the device to provide noise isolation. It must be tied to a low-impedance point on the circuit board. REG18 30, 93 Supply – REG18. 1.8-V power supply for the device core. If the internal voltage regulator is enabled (REG_EN is tied low), these terminals must be left unconnected. The internal voltage regulator provides 1.8 V from DVDD. When the internal regulator is disabled (REG_EN is high), the REG18 terminals can be used to supply an external 1.8-V supply to the TSB43AB22 core. It is recommended that 0.1- µF bypass capacitors be used and placed close to these terminals. VDDP 20, 35, 48, 62, 78 Supply – PCI signaling clamp voltage power input. PCI signals are clamped per the PCI Local Bus Specification. In addition, if a 5-V ROM is used, the VDDP must be connected to 5 V. |
同様の部品番号 - TSB43AB22 |
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同様の説明 - TSB43AB22 |
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