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MC10EP51DR2G データシート(PDF) 7 Page - ON Semiconductor

部品番号 MC10EP51DR2G
部品情報  ECL D Flip-Flop with Reset and Differential Clock
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メーカー  ONSEMI [ON Semiconductor]
ホームページ  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC10EP51DR2G データシート(HTML) 7 Page - ON Semiconductor

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MC10EP51, MC100EP51
http://onsemi.com
7
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Figure 2. Fmax/Jitter
FREQUENCY (MHz)
1
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Measured
Simulated
(JITTER)
9
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Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
Driver
Device
Receiver
Device
QD
Q
D
Zo = 50 W
Zo = 50 W
50 W
50 W
VTT
VTT = VCC − 2.0 V
Figure 4. Tape and Reel Pin 1 Quadrant Orientation
Round Sprocket Holes
User Direction
of Unreeling
Designations
Quadrant A = Upper Left
Quadrant B = Upper Right
Quadrant C = Lower Left
Quadrant D = Lower Right
Quadrant
A
Quadrant
B
Quadrant
Quadrant
CD


同様の部品番号 - MC10EP51DR2G

メーカー部品番号データシート部品情報
logo
ON Semiconductor
MC10EP51DR2G ONSEMI-MC10EP51DR2G Datasheet
155Kb / 11P
   3.3V / 5V ECL D Flip?묯lop with Reset and Differential Clock
November, 2006 ??Rev. 6
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同様の説明 - MC10EP51DR2G

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