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MC100EPT22MNR4G データシート(PDF) 4 Page - ON Semiconductor

部品番号 MC100EPT22MNR4G
部品情報  3.3 V Dual LVTTL/LVCMOS to Differential LVPECL Translator
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メーカー  ONSEMI [ON Semiconductor]
ホームページ  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC100EPT22MNR4G データシート(HTML) 4 Page - ON Semiconductor

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MC100EPT22
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4
Table 6. AC CHARACTERISTICS (VCC = 3.0 V to 3.6 V, GND = 0.0 V (Note 1))
Symbol
Characteristic
−40°C
25°C
85°C
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
fmax
Maximum Frequency (Figure 2)
0.8
1.1
0.8
1.1
0.8
1.1
GHz
tPLH,
tPHL
Propagation Delay to
Output Differential
250
400
650
250
420
675
300
500
700
ps
tskew
Within−Device Skew (Note 2)
Device-to-Device Skew (Note 3)
50
200
100
400
50
200
100
425
50
200
100
400
ps
tJITTER
Random Clock Jitter (Figure 2)
0.2
< 1
0.2
< 1
0.2
< 1
ps
tJIT(F)
Additive Phase RMS Jitter
Integration Range 12 kHz to 20 MHz
25 MHz
156.25 MHz
0.05
0.16
ps
tr
tf
Output Rise/Fall Times
Q, Q (20%−80%)
50
110
200
60
120
220
70
140
250
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Measured using a 2.4 V source, 50% duty cycle clock source. All loading with 50 W to VCC − 2.0 V.
2. Skew is measured between outputs under identical transitions and conditions on any one device.
3. Device-to-Device Skew for identical transitions at identical VCC levels.
0
100
200
300
400
500
600
700
800
900
0
200
400
600
800
1000
1200
1400
1600
1
2
3
4
5
6
7
8
9
Figure 2. Fmax/Jitter
FREQUENCY (MHz)
(JITTER)


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